Back to results
US 11,081,177 B2Granted
Generating a reference current for sensing
AssigneeArm Limited
InventorAkshay Kumar
Life of this patent
Estimating the term…
Abstract
Broadly speaking, embodiments of the present techniques provide apparatus and methods for generating a reference current for a memory array sensing scheme, and for using the generated reference current to sense the state of memory cells within the memory array. The generated reference current is particularly suitable for distinguishing between a high resistance state and a low resistance state.
Claims18
A memory device comprising:
- a memory array comprising a plurality of correlated electron switch (CES) elements;
- and
- at least one tracking circuit to generate a reference current to read each of the plurality of CES elements in the memory array, and
- wherein the tracking circuit comprises a plurality of tracking bit cells stacked in a ladder arrangement to generate the reference current, each tracking bit cell formed of CES elements which are in a high resistance state and CES elements which are in a low resistance state.
1 more element
A memory device comprising:
- a memory array comprising a plurality of correlated electron switch (CES) elements;
- at least one tracking circuit to generate a reference current for reading each of the plurality of CES elements in the memory array, wherein the tracking circuit comprises a plurality of tracking bit cells stacked in a ladder arrangement to generate the reference current, each tracking bit cell formed of CES elements which are in a high resistance state and CES elements which are in a low resistance state;
- and
- a sensing circuit for reading, using the reference current, one or more of the correlated electron switch elements of the memory array.
1 more element
A method for reading a memory device, the method comprising:
- applying a read voltage to a tracking circuit, the tracking circuit for generating a reference current for reading a memory array comprising a plurality of correlated electron switch (CES) elements and wherein the tracking circuit comprises a plurality of tracking bit cells stacked in a ladder arrangement to generate the reference current, each bit cell formed of CES elements which are in a high resistance state and CES elements which are in a low resistance state;
- generating a reference current;
- and
- providing the reference current to one or more read circuits for reading the plurality of CES elements of the memory array.
1 more element
Dependencies are inferred from the claim text.