Semiconductor device and data retention method
AssigneeRenesas Electronics Corporation
InventorsDaisuke Nakamura, Yoshisato Yokoyama
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Abstract
A semiconductor device has a first memory circuit comprising a first memory cell comprising a first field effect transistor, a second memory circuit comprising a second memory cell comprising a second field effect transistor, and a regulator for converting the first power supply potential to a second voltage value lower than the voltage value of the first power supply potential. The second gate length of the second field effect transistor is longer than the first gate length of the first field effect transistor, the first memory cell is supplied with a second power supply potential through regulator, and the second memory cell is supplied with a first power supply potential.
Claims17
A semiconductor device comprising:
- a first memory cell of static type comprised of a first field effect transistor;
- a second memory cell of static type comprised of a second field effect transistor;
- a first memory circuit including the first memory cell;
- a second memory circuit including the second memory cell;
- and
- a regulator which converts a first power supply potential to a second power supply potential having a voltage value lower than that of the first power supply potential,
- wherein a second gate length of the second field effect transistor is longer than a first gate length of the first field effect transistor,
- wherein the first memory circuit is supplied with the second power supply potential through the regulator, and
- wherein the second memory circuit is supplied with the first power supply potential.
A semiconductor device comprising:
- a first memory cell of static type including a first field effect transistor;
- a second memory cell of static type including a second field effect transistor;
- a first memory circuit including the first memory cell;
- a second memory circuit including the second memory cell;
- and
- a regulator which converts a first power supply potential to a second power supply potential having a voltage value lower than that of the first power supply potential,
- wherein a thickness of a second gate insulating film of the second field effect transistor is thicker than a thickness of a first gate insulating film of the first field effect transistor,
- wherein, in a first mode, the first memory cell is supplied with the second power supply potential through the regulator,
- wherein, in a second mode, the second memory cell is supplied with the first power supply potential,
- wherein, in the first mode, the first memory circuit is supplied with the second power supply potential through the regulator, and
- wherein, in the second mode, the first power supply potential supplied to the regulator is cut off.
Dependencies are inferred from the claim text.