Source follower-based sensing scheme

An apparatus, comprising:

• a first switching component comprising a gate that is coupled with a digit line of a memory cell and a first output terminal that is coupled with a first input terminal of a sense component;
• a second switching component comprising a gate that is coupled with a reference voltage supply and a second output terminal that is coupled with a second input terminal of the sense component;
• the sense component comprising the first input terminal coupled with the first output terminal of the first switching component and comprising the second input terminal coupled with the second output terminal of the second switching component;
• a third switching component coupled with a first terminal of the sense component and the first output terminal of the first switching component;
• a fourth switching component coupled with a second terminal of the sense component and the second output terminal of the second switching component;
• a fifth switching component in series with the third switching component and coupled with the first terminal of the sense component;
• and
• a sixth switching component in series with the fourth switching component and coupled with the second terminal of the sense component.

An apparatus, comprising:

• a first switching component comprising a gate that is coupled with a digit line of a memory cell and a first output terminal that is coupled with a first input terminal of a sense component;
• a second switching component comprising a gate that is coupled with a reference voltage supply and a second output terminal that is coupled with a second input terminal of the sense component;
• the sense component comprising the first input terminal coupled with the first output terminal of the first switching component and comprising the second input terminal coupled with the second output terminal of the second switching component;
• a third switching component coupled with the gate of the first switching component and the digit line of the memory cell;
• and
• a fourth switching component coupled with the gate of the first switching component and the third switching component.

A method, comprising:

• outputting, by a first switching component, a first signal that is a replication of a second signal received at a gate of the first switching component, the second signal representing a logic state stored by a memory cell;
• outputting, by a second switching component, a third signal that is a replication of a fourth signal received at a gate of the second switching component, the fourth signal representing a reference voltage;
• and
• determining the logic state stored by the memory cell based at least in part on outputting the first signal and the third signal.

An apparatus, comprising:

• a first switching component coupled with a sense component and a digit line of a memory cell, the first switching component configured to receive a first signal at a gate of the first switching component and output a second signal that is a replication of the first signal;
• a second switching component coupled with a reference voltage supply and the sense component, the second switching component configured to receive a third signal at a gate of the second switching component and output a fourth signal that is a replication of the third signal;
• and
• the sense component coupled with the first and second switching components and configured to compare the second signal output by the first switching component and the fourth signal output by the second switching component.