Voltage regulation circuitry

A device comprising:

• a clock generator that generates a clock signal and provides write reference signals;
• a voltage divider that receives the write reference signals and provides an output reference signal based on:
• write polarity of the write reference signals;
• and
• a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal;
• wherein a voltage level of the write reference signals is trimmed differently for the write polarity based on one or more trimming signals, and wherein the voltage divider provides the output reference signal based on arrival of the clock signal from the clock generator.

A device, comprising:

• a clock generator that provides write reference signals;
• a voltage divider that receives the write reference signals and provides an output reference signal based on write polarity of the write reference signals;
• and
• a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal;
• wherein the voltage divider comprises a divide-by-2 voltage divider, and wherein the voltage level of the write reference signals is selected based on the write reference signals when a clock signal arrives from the clock generator.

A device, comprising:

• a clock generator that provides write reference signals;
• a voltage divider that receives the write reference signals and provides an output reference signal that is proportional to a selected write reference signal of the write reference signals;
• and
• a voltage regulator that receives the output reference signal and provides a regulated voltage to a memory circuit based on the output reference signal, the voltage regulator having a frequency compensation circuit that controls overshoot across a component of the memory circuit;
• wherein the voltage regulator is clocked with a clock signal from the clock generator so as to thereby operate with reduced static power, and wherein the voltage regulator provides the regulated voltage to the memory circuit based on arrival of the clock signal from the clock generator.

A device, comprising:

• a clock generator having a reference voltage generator that provides write reference signals for regulating write voltages associated with write operations;
• a voltage divider that receives the write reference signals and provides a proportional reference signal based on a selected reference signal of the write reference signals;
• and
• a voltage regulator that receives the proportional reference signal and provides a regulated voltage to a load based on the proportional reference signal;
• wherein the write reference signals comprise a first write reference signal and a second write reference signal that is different than the first write reference signal, and wherein the first write reference signal or the second write reference signal is selected based on write data associated with the write reference signals.

A device, comprising:

• a clock generator that provides write reference signals;
• a voltage divider that receives the write reference signals and provides an output reference signal that is proportional to a selected write reference signal of the write reference signals;
• and
• a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal, the voltage regulator having an amplifier that uses dynamic body biasing of an input transistor to reduce static leakage while providing increased voltage headroom to a current source;
• wherein the voltage regulator receives the write reference signals based on arrival of a clock signal from the clock generator, and wherein the voltage regulator provides the regulated voltage to the load based on arrival of the clock signal from the clock generator.