Methods, semiconductor devices, and semiconductor systems

A semiconductor device comprising:

• a control circuit configured to generate a control signal including a pulse, which is generated responsive to address signals having a certain combination being input from an external device a predetermined number of times or more, and generate shifting signals which are counted responsive to the address signals having the certain combination being input from the external device the predetermined number of times or more, during a write operation;
• a data input/output (I/O) circuit coupled to the control circuit and configured to shift data and error information on the data to generate internal data, responsive to the pulse of the control signal;
• and
• a memory device coupled to the data input/output circuit, which is configured to store the internal data in a page which is selected by the address signals having the certain combination during the write operation and configured to output the internal data stored in the page which is selected by the address signals having the certain combination during a read operation.