Memory device for artificial intelligence operation
AssigneeWinbond Electronics Corp.
InventorSan-Ha Park
Life of this patent
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Abstract
A memory device is provided. The memory device includes: a plurality of subarrays, a row controller, a column controller, a plurality of sense amplifiers, a plurality of sub word line drivers, and a plurality of logic circuits. Each of the subarrays are electrically coupled to each other. The row controller is configured to control at least a row of the subarrays. The column controller is configured to control at least one column of the subarrays. The sense amplifiers are adapted to each of the subarrays are enabled during a data access operation. The sub word line drivers are disposed adjacent to each of the subarrays and provides a driving signal corresponds to the subarrays. The plurality of logic circuits is disposed in the subarrays and configured to perform the data access operation.
Claims9
A memory device, comprising:
- a plurality of subarrays, wherein each of the subarrays are electrically coupled to each other;
- a row controller, configured to control at least one row of the subarrays;
- a column controller, configured to control at least one column of the subarrays;
- a plurality of sense amplifiers, adapted to each of the subarrays are enabled during a data access operation;
- a plurality of sub word line drivers, disposed adjacent to each of the subarrays and provides a driving signal corresponds to the subarrays;
- and
- a plurality of logic circuits, wherein each one of the logic circuits is disposed between each pairs of the subarrays in column direction and disposed on one side on an edge of the subarrays in the column direction, configured to perform the data access operation.
Dependencies are inferred from the claim text.