Pseudo-cryogenic semiconductor device having pseudo-cryogenic temperature sensor and voltage supplier and pseudo-cryogenic semiconductor stack
AssigneeSK hynix Inc.
InventorWon-Kyung Park
Life of this patent
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Abstract
A pseudo-cryogenic semiconductor device includes memory cells having a plurality of transistors; and a bulk bias voltage supply circuit configured to provide a bulk bias voltage to be applied to a bulk region of the memory cells. The bulk bias voltage supply circuit includes a first temperature sensing circuit configured to generate a first voltage adjustment signal by sensing a temperature in a range from about 70° K to about 173° K; and a bulk bias voltage selector configured to receive the first voltage adjustment signal, select one of a first bulk bias voltage and a second bulk bias voltage different from the first bulk bias voltage, and output the selected voltage as the bulk bias voltage.
Claims20
A pseudo-cryogenic semiconductor device comprising:
- memory cells having a plurality of transistors;
- and
- a bulk bias voltage supply circuit configured to provide a bulk bias voltage to be applied to a bulk region of the memory cells,
- wherein the bulk bias voltage supply circuit comprises:
- a first temperature sensing circuit configured to generate a first voltage adjustment signal by sensing a temperature in a range from about 70° K to about 173° K;
- a bulk bias voltage selector configured to receive the first voltage adjustment signal, select one of a first bulk bias voltage and a second bulk bias voltage different from the first bulk bias voltage, and output the selected voltage as the bulk bias voltage;
- and
- a pre-switching circuit including an on-off switch configured to substantially prevent an initial bulk bias voltage from being provided to the bulk bias voltage selector.
A pseudo-cryogenic semiconductor device comprising:
- a memory block having first to fourth memory banks;
- and
- a logic block including first to fourth voltage supply circuits coupled with the first to fourth memory banks respectively to independently supply voltages to the first to fourth memory banks,
- wherein each of the first to fourth voltage supply circuits comprises:
- a temperature sensing circuit configured to generate voltage adjustment signals by sensing a temperature in a range from about 70° K to about 173° K;
- a first bias voltage supply circuit configured to receive the voltage adjustment signals and supply a first bias voltage to a bulk region of the coupled memory banks;
- and
- a first reference voltage supply circuit configured to receive the voltage adjustment signals and supply a first reference voltage to the coupled memory banks,
- wherein the first reference voltage supply circuit comprises:
- a first reference voltage generator configured to generate a first initial reference voltage having a positive (+) value;
- a first reference voltage splitter configured to receive the first initial reference voltage and generate a plurality of first intermediate reference voltages having a positive (+) value;
- and
- a first reference voltage selector configured to select one of the first intermediate reference voltages and outputs the selected voltage as the first reference voltage.
A semiconductor stack comprising:
- a main board;
- a plurality of semiconductor devices mounted on the main board;
- and
- a cooling system configured to cool the plurality of semiconductor devices to a temperature in a range from about 70° K to about 173° K,
- wherein each of the semiconductor devices includes voltage supply circuits that operate independently, and
- wherein each of the voltage supply circuits includes:
- a temperature sensing circuit configured to generate voltage adjustment signals according to the temperature to which plurality of semiconductor devices are cooled;
- voltage selectors configured to adjust output voltages according to the voltage adjustment signals;
- and
- a pre-switching circuit including an on-off switch configured to substantially prevent an initial bulk bias voltage from being provided to the voltage selectors.
A voltage supplying circuit for a pseudo-cryogenic semiconductor device comprising:
- a temperature sensing circuit suitable for sensing a temperature of the semiconductor device and generating a voltage adjustment signal based on the sensed temperature;
- a bias voltage generator suitable for receiving an input bias voltage and adjusting the input bias voltage to generate an intermediate bias voltage;
- a bias voltage selector suitable for selectively selecting one of the intermediate bias voltage and a ground voltage according to the voltage adjustment signal, and outputting the selected voltage as an output bias voltage, and
- a pre-switching circuit including an on-off switch configured to substantially prevent an initial bulk bias voltage from being provided to the bias voltage selector.
Dependencies are inferred from the claim text.