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US 11,081,066 B2Granted
Via placement for slim border electro-optic display backplanes with decreased capacitive coupling between t-wires and pixel electrodes
AssigneeE Ink Corporation
InventorsChih-Hsiang Ho, Yi Lu, Yuval Ben-Dov, Teck Ping Sim
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Abstract
An electro-optic display including an array of pixel electrodes, where each row of pixel electrodes is associated with a source line, and that source line is connected to a drive chip with a T-wire that connects from the back of the substrate to the front of the substrate through a via. The vias are spaced out, such as in a zig-zag pattern or a pseudo-random pattern to reduce the capacitive coupling between the T-wires when adjacent pixels are driven, for example when presenting text characters.
Claims19
An electro-optic display, comprising:
- a driver chip;
- and
- a backplane comprising a substrate, the substrate including a front side comprising an array of pixel electrodes including pixel rows and pixel columns, wherein there are more pixel rows than pixel columns on the backplane and each pixel electrode has a thin-film transistor associated therewith, each thin-film transistor being coupled to a column line,
- each of the pixel rows including a row line running parallel to the pixel row, each row line being coupled to a T-wire and all of the thin-film transistors in the pixel row,
- each T-wire also being coupled to the driver chip, wherein each T-wire runs along a back side of the substrate in a direction substantially perpendicular to the row line, and each T-wire transitions to the front side of the substrate through a via,
- wherein each via for each T-wire has a nearest neighbor via identifiable by drawing consecutive circles with increasing radii, but having a center at the via for the T-wire, wherein the first time a second via is captured by one of the concentric circles, the second via is the nearest neighbor via, and wherein the via for the T-wire and the nearest neighbor via are not aligned with the same pixel column.
3 more elements
A method of forming an electro-optic display, comprising:
- providing a driver chip and a backplane, wherein the backplane comprises a substrate having a plurality of pixel electrodes arranged in an array of a plurality of pixel rows and a plurality of pixel columns on a front side of the substrate, wherein there are more pixel rows than pixel columns and each pixel electrode has a thin-film transistor associated therewith, each thin-film transistor being coupled to a row line and a column line, and wherein each of the plurality of pixel rows has a row line coupled to all of the thin-film transistors in the pixel row;
- forming a first plurality of T-wires associated with a first pixel column of the plurality of pixel columns on a back side of the substrate, wherein each of the first plurality of T-wires is connected to the driver chip;
- forming a first plurality of vias within the backplane such that no two vias are associated with adjacent pixel rows of any pixel column, and such that each via has a nearest neighbor via identifiable by drawing consecutive circles with increasing radii, but having a center at the via, wherein the first time a second via is captured by one of the concentric circles, the second via is the nearest neighbor via, and wherein for each via of the first plurality of vias the via and the nearest neighbor via are not aligned with the same pixel column;
- and
- connecting each of the first plurality of T-wires to a respective one of a first plurality of row lines using one of the first plurality of vias disposed within the backplane.
2 more elements
Dependencies are inferred from the claim text.