US 11,080,457 B1Granted

Layer assignment and routing based on resistance or capacitance characteristic

AssigneeCadence Design Systems, Inc.

InventorsDerong Liu, Yi-Xiao Ding, Mehmet Can Yildiz, Zhuo Li

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Abstract

Various embodiments provide for layer assignment of a network of a circuit design based on a resistance or capacitance characteristic, such as a resistance/capacitance characteristic associated with a layer, a wire, or a via of the circuit design. In particular, various embodiments consider a resistance/capacitance characteristic of a layer, a wire, or a via of a circuit design to determine a set of layers for routing one or more networks of the circuit design, which can enable some embodiments to route the networks on the layers within a certain range that has very close resistance/capacitance (RC) characteristics, and can permit routing each network on layers having the smallest RC characteristic difference.

Claims19

Dependent claims

A method comprising:

accessing, by a hardware processor, circuit design data that describes a set of networks of a circuit design, that describes a plurality of layers of the circuit design, and that describes an individual set of layer characteristics for each individual layer in the plurality of layers, each individual set of layer characteristics comprising a resistance characteristic and a capacitance characteristic;
determining, by the hardware processor, a set of layer groups by assigning each given layer, in the plurality of layers, to a given layer group of the set of layer groups based on the individual set of layer characteristics of the given layer;
routing, by the hardware processor, the set of networks based on the set of layer groups, the routing the set of networks based on the set of layer groups comprising:
routing a first subset of the set of networks associated with a first layer group from the set of layer groups, the routing the first subset of networks comprising performing a layer assignment process on the first subset of networks using a first layer range provided by the first layer group, the layer assignment process considering a resistance-capacitance cost in assigning a network node to an individual layer, the resistance-capacitance cost representing a difference of at least one of a resistance characteristic or a capacitance characteristic between two layers, the layer assignment process comprising:
for each available layer in a set of available layers for the network node, determining a potential resistance-capacitance cost of assigning the network node to the available layer;
and
selecting a given available layer, in the set of available layers, as the individual layer based on the potential resistance-capacitance cost of assigning the network node to the given available layer;
and
generating, by the hardware processor, a circuit design layout based on the routed set of networks.

6 more elements

A device comprising:

a memory storing instructions;
and
a hardware processor communicatively coupled to the memory and configured by the instructions to perform operations comprising:
accessing circuit design data that describes a set of networks of a circuit design, that describes a plurality of layers of the circuit design, and that describes an individual set of layer characteristics for each individual layer in the plurality of layers, each individual set of layer characteristics comprising a resistance characteristic and a capacitance characteristic;
determining a set of layer groups by assigning each given layer, in the plurality of layers, to a given layer group of the set of layer groups based on the individual set of layer characteristics of the given layer;
routing the set of networks based on the set of layer groups, the routing the set of networks based on the set of layer groups comprising:
routing a first subset of the set of networks associated with a first layer group from the set of layer groups, the routing the first subset of networks comprising performing a layer assignment process on the first subset of networks using a first layer range provided by the first layer group, the layer assignment process considering a resistance-capacitance cost in assigning a network node to an individual layer, the resistance-capacitance cost representing a difference of at least one of a resistance characteristic or a capacitance characteristic between two layers, the layer assignment process comprising:
for each available layer in a set of available layers for the network node, determining a potential resistance-capacitance cost of assigning the network node to the available layer;
and
selecting a given available layer, in the set of available layers, as the individual layer based on the potential resistance-capacitance cost of assigning the network node to the given available layer;
and
generating a circuit design layout based on the routed set of networks.

9 more elements

A non-transitory computer-readable medium comprising instructions that, when executed by a hardware processor of a device, cause the device to perform operations comprising:

accessing circuit design data that describes a set of networks of a circuit design, that describes a plurality of layers of the circuit design, and that describes an individual set of layer characteristics for each individual layer in the plurality of layers, each individual set of layer characteristics comprising a resistance characteristic and a capacitance characteristic;
determining a set of layer groups by assigning each given layer, in the plurality of layers, to a given layer group of the set of layer groups based on the individual set of layer characteristics of the given layer;
routing the set of networks based on the set of layer groups, the routing the set of networks based on the set of layer groups comprising:
routing a first subset of the set of networks associated with a first layer group from the set of layer groups, the routing the first subset of networks comprising performing a layer assignment process on the first subset of networks using a first layer range provided by the first layer group, the layer assignment process considering a resistance-capacitance cost in assigning a network node to an individual layer, the resistance-capacitance cost representing a difference of at least one of a resistance characteristic or a capacitance characteristic between two layers, the layer assignment process comprising:
for each available layer in a set of available layers for the network node, determining a potential resistance-capacitance cost of assigning the network node to the available layer;
and
selecting a given available layer, in the set of available layers, as the individual layer based on the potential resistance-capacitance cost of assigning the network node to the given available layer;
and
generating a circuit design layout based on the routed set of networks.

6 more elements

Dependencies are inferred from the claim text.