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US 11,080,432 B2Granted
Hardware countermeasures in a fault tolerant security architecture
AssigneeTexas Instruments Incorporated
InventorAmritpal Singh Mundra
Life of this patent
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Abstract
A system-on-chip (SoC) is provided that includes security control registers, the security control registers including security flags for security critical assets of the SoC, wherein each security flag includes multiple bits. A set of security critical bits is signaled from a configuration storage of the SoC with a set of validation bits to be used to validate the set of security critical bits.
Claims26
A system-on-chip (SoC) comprising:
- a device management security controller (DMSC) comprising:
- a processor;
- a bus subsystem coupled to the processor, and comprising:
- a hardware firewall module;
- and
- a security manager coupled to the hardware firewall module, and comprising:
- security control registers comprising:
- security flags for security critical assets of the SoC, wherein:
- each security flag comprises multiple bits;
- a first of the security control registers is a DMSC firewall bypass register configured to:
- set the hardware firewall module to a bypass mode based on a value of a first security flag of the first of the security control registers, and;
- lock the first of the security control registers based on a value of a second security flag of the first of the security control registers;
- and
- once locked, via the second security flag, the first of the security control registers can be changed only after execution of a power-on reset.
11 more elements
A method of operating a system-on-chip (SoC), the method comprising:
- receiving a first power on reset (POR) signal in the SoC;
- reading values of security flags for security critical assets of the SoC from a configuration storage of the SoC responsive to the first POR signal;
- and
- storing the values of the security flags in security control registers of the SoC, wherein:
- each security flag value comprises multiple bits;
- a first of the security control registers is a device management security controller (DMSC) firewall bypass register configured to:
- set a hardware firewall module to a bypass mode based on a value of a first security flag of the first of the security control registers, and
- lock a value stored in the first of the security control registers based on a second security flag of the first of the security control registers;
- and
- once locked, via the second security flag, the first of the security control registers can be changed only after receiving a second power-on reset in the SoC.
7 more elements
Dependencies are inferred from the claim text.