Processor for calculating mathematical functions in parallel
AssigneesHangZhou HaiCun Information Technology Co., Ltd., Guobiao Zhang
InventorsGuobiao Zhang, Chen Shen
Life of this patent
Estimating the term…
Abstract
A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprises a larger number (e.g. at least one thousand) of computing elements, with each computing element comprising at least one three-dimensional memory (3D-M) array for storing at least a portion of a look-up table (LUT) for a mathematical function and an arithmetic logic circuit (ALC) for performing arithmetic operations on the LUT data. Even though each individual 3D-M cell is slower than a conventional two-dimensional memory (2D-M) cell, this deficiency in speed is offset by a significantly larger scale of parallelism.
Claims20
A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprising a single semiconductor substrate and a plurality of computing elements, each of said computing elements comprising:
- at least a three-dimensional memory (3D-M) array including memory cells above said semiconductor substrate and storing at least a portion of a look-up table (LUT) for a mathematical function;
- an arithmetic logic circuit (ALC) on said semiconductor substrate for performing at least an arithmetic operation on selected data from said LUT;
- and,
- a plurality of inter-storage-processor (ISP) connections for communicatively coupling said 3D-M array with said ALC;
- wherein said semiconductor substrate comprises at least a single-crystalline semiconductor material;
- and, said memory cells do not comprise any single-crystalline semiconductor material.
A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprising a single semiconductor substrate and a plurality of computing elements, each of said computing elements comprising:
- at least a three-dimensional memory (3D-M) array including memory cells above said semiconductor substrate and storing at least a portion of a look-up table (LUT) for a mathematical function;
- an arithmetic logic circuit (ALC) on said semiconductor substrate for performing at least an arithmetic operation on selected data from said LUT;
- and,
- a plurality of inter-storage-processor (ISP) connections for communicatively coupling said 3D-M array with said ALC;
- wherein said processor comprises at least one thousand computing elements;
- and, the total LUT capacity of said processor is more than one gigabit.
Dependencies are inferred from the claim text.