Hybrid memory access frequency
AssigneeInternational Business Machines Corporation
InventorsHubertus Franke, Bulent Abali, Damir Anthony Jamsek, Marcio Augusto Silva
Life of this patent
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Abstract
Techniques that facilitate hybrid memory access frequency are provided. In one example, a system stores access frequency data for storage class memory and volatile memory in a translation lookaside buffer. The access frequency data is indicative of a frequency of access to the storage class memory and the volatile memory. The system also determines whether to store data in the storage class memory or the volatile memory based on the access frequency data stored in the translation lookaside buffer.
Claims20
A system, comprising:
- a memory that stores computer executable components;
- a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
- an access frequency component that:
- generates a scaled counter representative of access frequency data for storage class memory and volatile memory, wherein the access frequency data indicates a frequency of access to the storage class memory and the volatile memory, and
- stores the scaled counter, comprising:
- in response to a miss occurring with a translation lookaside buffer, storing the scaled counter in the translation lookaside buffer, and
- in response to an event, selected from a group consisting of an eviction and a writeback, occurring with the translation lookaside buffer storing the scaled counter in a page table entry;
- and
- a memory management component that determines whether to store data in the storage class memory or the volatile memory based on the scaled counter.
A computer-implemented method, comprising:
- generating, by a system operatively coupled to a processor, a scaled counter representative of access frequency data for storage class memory and volatile memory, wherein the access frequency data indicates a frequency of access to the storage class memory and the volatile memory;
- storing, by the system, the scaled counter, comprising:
- in response to a miss occurring with a translation lookaside buffer, storing the scaled counter in the translation lookaside buffer, and
- in response to an event, selected from a group consisting of an eviction and a writeback, occurring with the translation lookaside buffer storing the scaled counter in a page table entry;
- receiving, by the system, data associated with a computing process;
- and
- determining, by the system, whether to store the data in the storage class memory or the volatile memory based on the scaled counter.
A computer-implemented method, comprising:
- generating, by a system operatively coupled to a processor, a scaled counter representative of access frequency data for storage class memory and volatile memory, wherein the access frequency data indicates a frequency of access to the storage class memory and the volatile memory;
- storing, by the system, the the scaled counter, comprising:
- in response to a miss occurring with a translation lookaside buffer, storing the scaled counter in the translation lookaside buffer, and
- in response to an event, selected from a group consisting of an eviction and a writeback, occurring with the translation lookaside buffer storing the scaled counter in a page table entry;
- and
- determining, by the system, whether to store data in the storage class memory or the volatile memory based on the scaled counter.
Dependencies are inferred from the claim text.