System, method, and apparatus for enhanced pointer identification and prefetching

An apparatus comprising:

• predictor circuitry to:
• track a plurality of load instructions, the plurality of load instructions including a first load instruction to cause access of a first data, the first data comprising a first memory address identifying a first memory location;
• detect a second load instruction, the second load instruction to cause access of a second memory location for a second data, the second memory location identified by a second memory address different from the first memory address;
• determining that the first memory address and the second memory address are located in a same cache line;
• responsive to the determining, update a list of pointer load instructions to include information identifying the first load instruction as a pointer load instruction, wherein a pointer load instruction is a load instruction that is associated with a pointer for identifying a target memory location;
• detect a third load instruction;
• and
• identifying the third load instruction as a pointer load instruction based on the information in the list of pointer load instructions;
• and
• prefetcher circuitry to:
• prefetch a third data to be accessed according to the third load instruction prior to an execution of the third load instruction;
• and
• responsive to the predictor circuitry identifying the third load instruction as a pointer load instruction, automatically prefetching a fourth data from a fourth memory location, wherein the fourth memory location is identified by the third data.

A method comprising:

• analyzing program code comprising a first and a second load instruction to identify a dependency between the first and the second load instruction, wherein the first load instruction is to access a first data and the second load instruction to is access a second data, wherein the dependency exists when a first location pointed to by the first data is in a same cache line as a second location in which the second data is stored, the first and second locations identified by different memory addresses;
• responsive to identifying the dependency, generating a pointer load instruction to replace the first load instruction in the program code;
• and
• detecting the pointer load instruction is to be executed and responsively prefetching the first data to be accessed according to the pointer load instruction and the second data from the second location based on the first data and information associated with the pointer load instruction.

A system comprising:

• predictor to:
• analyze program code, which comprising a first and a second load instruction, to identify a dependency between the first and the second load instruction, wherein the first load instruction is to access a first data and the second load instruction to is access a second data, wherein the dependency exists when a first location pointed to by the first data is in a same cache line as a second location in which the second data is stored, the first and second locations identified by different memory addresses;
• generate a pointer load instruction to replace the first load instruction responsive to identifying the dependency between the first and the second load instruction;
• and
• prefetcher circuitry to detect that the pointer load instruction is to be executed and responsively prefetch the first data to be accessed according to the pointer load instruction and the second data from the second location that is determined based on the first data and information associated with the pointer load instruction.