Method for improving the execution time of a computer application
AssigneeBull SAS
InventorsTrong Ton Pham, Lionel Vincent, Grégoire Pichon
Life of this patent
Estimating the term…
Abstract
A method for improving the execution time of a computer application comprises at least one cycle includes: a step of determining the type of memory access time sequence occurring during execution of the computer application; a step of preloading data, from a file system to a cache memory system, according to the determined type of memory access time sequence. The determination step is carried out by a learning model having been previously configured using a database of certain predetermined types of memory access time sequences.
Claims15
A method for improving the execution time of a computer application, comprising at least one cycle comprising:
- a step of determining a type of memory access time sequence occurring during execution of said computer application;
- and
- a step of preloading data, from a file system to a cache memory system, according to the determined type of memory access time sequence,
- wherein said step of determining is carried out by a learning model having been previously configured using a database containing certain predetermined types of memory access time sequences, and extracting from said database data representative of the types of memory access time sequences contained in the database, the data representative of the types of memory access time sequences being grouped into multidimensional vectors injected in the learning model during configuration of said learning model.
A method for improving the execution time of a computer application, comprising at least one cycle comprising:
- a step of determining a type of memory access time sequence occurring during execution of said computer application,
- a step of preloading data, from a file system to a cache memory system, according to the determined type of memory access time sequence,
- said determination step carried out by a learning model having been previously configured using a database of predetermined types of memory access time sequences,
- wherein the predetermined types of memory access time sequences of said determination step comprises four different types of memory access time sequence:
- a sequential access type, where data blocks are consecutively read and/or written in a memory area,
- a multi-sequential access type with a regular offset between the sequences, where data blocks are read and/or written from plural different locations in a memory area, switching regularly from one location to another,
- a random access type, and
- a complex access type, where the sequence is formed of regular or quasi-regular subsequences which are repeated but in a disordered manner and/or where the sequence is regular or quasi-regular and is formed of subsequences which are repeated but in a disordered manner,
- and wherein the preloading step is performed for each of the types of memory access time sequence, except for the random access type for which no data are preloaded in the preloading step.
Dependencies are inferred from the claim text.