Method to ensure forward progress of a processor in the presence of persistent external cache/TLB maintenance requests

A method, comprising:

• processing, by a plurality of processors, instructions corresponding to one or more software applications;
• transferring, by a communication fabric, data between a memory and the plurality of processors;
• wherein in response to receiving, via the communication fabric, a first maintenance request that comprises a request to modify one or more address translations of a plurality of address:
• determining, by a processor of the plurality of processors, a type of the first maintenance request is a first type of maintenance requests;
• in response to determining the maintenance requests of the first type are blocked:
• continue processing, by circuitry of one or more computation units of the plurality of processors, program instructions including memory access instructions of one or more applications;
• and
• sending, by the control logic in the processor, an indication to a communication fabric interface in the processor specifying that the communication fabric interface hold other received maintenance requests.

A computing system comprising:

• a memory;
• a plurality of processors;
• and
• a communication fabric coupled to each of the plurality of processors and the memory;
• wherein in response to receiving, via the communication fabric, a first maintenance request that comprises a request to modify one or more address translations of a plurality of address, a processor of the plurality of processors is configured to:
• determine a type of the first maintenance request is a first type of maintenance requests;
• in response to determining that the type of maintenance request is not blocked, send an indication to one or more computation units to process the received maintenance request;
• and
• based at least in part on a determination that maintenance requests of the first type are blocked:
• continue processing, by circuitry of one or more computation units of the plurality of processors, program instructions including memory access instructions of one or more applications;
• and
• send, an indication to a communication fabric interface specifying that the communication fabric interface hold other received maintenance requests.