Error coalescing
AssigneeRambus Inc.
InventorJohn Eric Linstadt
Life of this patent
Estimating the term…
Abstract
A programmable crossbar matrix or an array of steering multiplexors (MUXs) coalesces (i.e., routes) the data values from multiple known “bad” bit positions within multiple symbols of a codeword, to bit positions within a single codeword symbol. The single codeword symbol receiving the known “bad” bit positions may correspond to a check symbol (vs. a data symbol). Configuration of the routing logic may occur at boot or initialization time. The configuration of the routing logic may be based upon error mapping information retrieved from system non-volatile memory (e.g., memory module serial presence detect information), or from memory tests performed during initialization. The configuration of the routing logic may be changed on a per-rank basis.
Claims20
A memory controller, comprising:
- first data steering circuitry to receive a first codeword comprising a first plurality of data symbol locations and a second plurality of check symbol locations, the first data steering circuitry to exchange at least one bit location in a check symbol location with a corresponding respective at least one bit location in a data symbol location to form a first error coalesced codeword, the first data steering circuitry to output the first error coalesced codeword.
A memory controller, comprising:
- first data steering logic to coalesce errors from a plurality of bit locations within a plurality of data symbol fields of a first codeword that have been determined to meet an unreliability criteria, a first error to be coalesced into a corresponding plurality of bit locations within a single check symbol field of the first codeword to produce an error coalesced codeword.
A method of operating a memory controller, comprising:
- receiving information indicating one or more bit positions in a memory rank meet an unreliability criteria;
- receiving a first block of data comprising a plurality of data fields and a plurality of check fields;
- before storing the first block of data to the memory rank, swapping values at the one or more bit positions with respective selected bit positions in a single check field of the plurality of check fields;
- and,
- storing the first block of data to the memory rank at an address.
Dependencies are inferred from the claim text.