Method, apparatus, and electronic device for improving parallel performance of CPU

A computer-implemented system, comprising:

• one or more computers;
• and
• one or more computer memory devices interoperably coupled with the one or more computers and having tangible, non-transitory, machine-readable media storing one or more instructions that, when executed by the one or more computers, perform one or more operations comprising:
• determining that a number of data requests that have been acquired by a CPU core of a CPU is greater than or equal to a maximum degree of parallelism of the CPU, wherein the data requests of the number of data requests are of a same type, and wherein the maximum degree of parallelism of the CPU is a maximum number of parallel threads executable by the CPU;
• and
• in response to determining that the number of data requests is greater than or equal to the maximum degree of parallelism of the CPU, executing, by the CPU core, executable codes corresponding to the maximum degree of parallelism of the CPU, wherein the executable codes comprise code programs that are compiled and linked based on the maximum degree of parallelism prior to executing the executable codes.