Apparatus, system and method for offloading data transfer operations between source and destination storage devices to a hardware accelerator

A system connected to a host processor and a plurality of storage devices having storage device controllers, comprising:

• a plurality of hardware accelerators configured to operate as a single systolic array to manage read and write operations with respect to a group of the storage devices, wherein the hardware accelerators operate in parallel or serial with respect to the group of the storage devices, and wherein the hardware accelerator is implemented in hardware separate from the storage devices and the storage device controllers of the storage devices,
• wherein each of the hardware accelerators configured in the single systolic array comprise:
• a memory space including read buffers and write buffers for the storage devices;
• and control logic to:
• receive, from the host processor, a command descriptor indicating a source storage device of the group of the storage devices having transfer data to transfer to a destination storage device of the group of the storage devices, an operation code indicating a type of data transfer to be performed between the source storage device and the destination storage device, and a computational task to perform on the transfer data;
• send read commands to the source storage device to read the transfer data to at least one read buffer in the memory space;
• perform the computational task on the transfer data in the at least one read buffer to process the transfer data and transform to produce modified transfer data;
• and
• write the modified transfer data to at least one write buffer in the memory space to cause the modified transfer data to be written to the destination storage device.

A system in communication with a host processor, comprising:

• Dual In-line Memory Modules (DIMMs) implementing a memory space of the host processor;
• a plurality of storage devices having storage device controllers;
• and
• a hardware accelerator, comprising:
• a memory space including read buffers and write buffers for the storage devices providing an extension of the memory space of the host processor, wherein the hardware accelerator is implemented in hardware separate from the storage devices and the storage device controllers of the storage devices;
• and
• control logic to:
• receive, from the host processor, a command descriptor indicating a source storage device having transfer data to transfer to a destination storage device, an operation code indicating a type of data transfer to be performed between the source storage device and the destination storage device, and a computational task to perform on the transfer data;
• send read commands to the source storage device to read the transfer data to at least one read buffer in the memory space;
• perform the computational task on the transfer data in the at least one read buffer to process the transfer data and transform to produce modified transfer data;
• and
• write the modified transfer data to at least one write buffer in the memory space to cause the modified transfer data to be written to the destination storage device.

A method implemented in a hardware accelerator for transferring data among storage devices having storage device controllers, comprising:

• providing a memory space including read buffers and write buffers for the storage devices, wherein the hardware accelerator is implemented in hardware separate from the storage devices and the storage device controllers of the storage devices;
• receiving, from a host processor, a command descriptor indicating a source storage device having transfer data to transfer to a destination storage device and a computational task to perform on the transfer data, an operation code indicating a type of data transfer to be performed between the source storage device and the destination storage device;
• send read commands to the source storage device to read the transfer data to at least one read buffer in a memory space including read buffers and write buffers for the storage devices;
• performing the computational task on the transfer data in the at least one read buffer to process the transfer data and transform to produce modified transfer data;
• and
• writing the modified transfer data to at least one write buffer in the memory space to cause the modified transfer data to be written to the at least one destination storage device.