Dynamic configuration of memory timing parameters

A processing system comprising:

• a memory controller coupleable to a random access memory (RAM);
• a read-only memory (ROM) configured to store boot information, wherein the boot information includes default values for a set of one or more memory timing parameters;
• and
• at least one processor coupled to the memory controller and the ROM, the at least one processor configured to:
• during initialization of the processing system, configure the memory controller to utilize the default values for the set of one or more memory timing parameters for signaling between the memory controller and the RAM;
• and
• during operation of the processing system following initialization:
• receive user input representing an updated value for one or more memory timing parameters of the set;
• and
• dynamically reconfigure the memory controller to utilize the updated value for a corresponding memory timing parameter of the set for the signaling by:
• in response to receiving the user input, temporarily suspending issuance of any new memory access requests to the memory controller,
• in response to detecting the memory controller has become idle, overwriting a value in a control register with a corresponding update value from the user input, and
• reactivating the memory controller with the one or more updated values stored to the control register;
• and
• wherein the processing system is configured to conduct one or more memory access operations for the RAM using the reconfigured memory controller.

A non-transitory computer readable medium embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor to:

• provide a graphical user interface (GUI) to a user of a processing system to facilitate user selection of one or more values for one or more corresponding memory timing parameters for a memory controller of the processing system;
• and
• dynamically update the memory controller to utilize the user-selected one or more values for corresponding memory timing parameters for signaling between the memory controller and a corresponding memory of the processing system by:
• in response to the user selection of one or more values, temporarily suspending issuance of any new memory access requests to the memory controller,
• in response to detecting the memory controller has become idle, overwriting a value in a control register with a corresponding updated value from the user input, and
• reactivating the memory controller with the one or more updated values stored to the control register.