# US 11,079,778 B2 · Modulating jitter frequency as switching frequency approaches jitter frequency

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,079,778 B2
- Document ID: US11079778B2
- Status: Granted
- Kind: B2
- Application number: 16/792,128
- Filed: 2020-02-14
- Published: 2020-07-09
- Granted: 2021-08-03
- Earliest claimed: 2016-09-16
- Assignees: Power Integrations, Inc.
- Applicants: Power Integrations, Inc.
- Inventors: Giao Minh Pham; Lance M. Wong
- Web page: https://patentgrep.com/patent/US11079778B2

## CPC

- G05F 1/46: wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence)
- G01R 29/26: Measuring noise figure; Measuring signal-to-noise ratio
- G01R 31/2841: {Signal generators}
- G01R 31/31709: {Jitter measurements; Jitter generators (measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901)}
- G02F 1/3515: {All-optical modulation, gating, switching, e.g. control of a light beam by another light beam (G02F1/353, G02F1/37, G02F1/39 take precedence)}
- H02M 1/44: Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
- H02M 3/33507: {with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence)}
- H03L 7/187: using means for coarse tuning the voltage controlled oscillator of the loop (H03L7/191 - H03L7/195 take precedence)
- H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter}
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)

## Abstract

A controller for use in a power converter including a jitter generator circuit coupled to receive a drive signal from a switch controller and generate a jitter signal. The jitter signal is a modulated jitter signal when the drive signal is below a first threshold frequency. The switch controller is coupled to a power switch coupled to an energy transfer element. The switch controller is coupled to receive a current sense signal representative of a current through the power switch. The switch controller is coupled to generate the drive signal to control switching of the power switch in response to the current sense signal and the jitter signal to control a transfer of energy from an input of the power converter to an output of the power converter.

## Claims

### Claim 1

A power converter, comprising
an energy transfer element coupled between an input of the power converter and an output of the power converter;
a power switch coupled to the energy transfer element, the power switch configured to control a transfer of energy from the input of the power converter to the output of the power converter; and
a controller, comprising:
a jitter generator circuit configured to generate a jitter signal, wherein the jitter signal is modulated in response to a drive signal detected to be below a first threshold frequency; and
a switch controller configured to generate the drive signal to control switching of the power switch in response to a current sense signal representative of a current through the power switch and the jitter signal.

### Claim 2 (depends on 1)

The power converter of claim 1, the jitter generator circuit comprising:
a jitter capacitor coupled to be charged by a first current source, the jitter capacitor flirther coupled to be discharged by a second current source, wherein a voltage of the jitter capacitor is the jitter signal;
a first comparator configured to generate a charge signal when the voltage of the jitter capacitor is less than a first voltage reference, the first comparator further configured generate a discharge signal when the voltage of the jitter capacitor is greater than a voltage reference;
a first switch configured to provide a coupling of the first current source and the jitter capacitor in response to the charge signal; and
a second switch configured to provide a coupling of the second current source and the jitter capacitor in response the discharge signal.

### Claim 3 (depends on 2)

The power converter of claim 2, the jitter generator circuit further comprising a timer circuit configured to generate a hold signal in response to the drive signal.

### Claim 4 (depends on 3)

The power converter of claim 3, wherein the hold signal is further configured to prevent a discharging of the jitter capacitor in response to the drive signal detected below the first threshold frequency.

### Claim 5 (depends on 3)

The power converter of claim 3, wherein the jitter signal is held substantially constant in response to the hold signal.

### Claim 6 (depends on 3)

The power converter of claim 3, the timer circuit comprising:
a one shot circuit configured to control a charging of a timing capacitor in response to the drive signal; and
a second comparator configured to generate a first state of the hold signal in response to a voltage of the timing capacitor being less than a third voltage reference, the second comparator further configured to generate a second state of the hold signal in response to the voltage of the timing capacitor being greater than the third voltage reference.

### Claim 7 (depends on 6)

The power converter of claim 6, wherein the third voltage reference is representative of a frequency threshold of when to modulate a frequency of the jitter signal.

### Claim 8 (depends on 6)

The power converter of claim 6, wherein a capacitance of the timing capacitor is representative of a frequency threshold to begin a frequency modulation of the jitter signal.

### Claim 9 (depends on 1)

The power converter of claim 1, wherein the jitter signal is a modulated jitter signal that is at a lower frequency than the jitter signal.

### Claim 10 (depends on 9)

The power converter of claim 9, wherein a maximum amplitude of the modulated jitter signal is equal to an amplitude of the jitter signal.

### Claim 11

A power converter, comprising:
an energy transfer element coupled between an input of the power converter and an output of the power converter;
a power switch coupled to the energy transfer element, the power switch configured to control a transfer of energy from the input of the power converter to the output of the power converter; and
a power converter controller configured to control the transfer of energy from the input of the power converter to the output of the power converter, the power converter controller comprising:
a primary controller configured to generate a drive signal to control switching of the power switch in response to a current sense signal representative of a current through the power switch and a jitter signal, wherein the jitter signal is modulated in response to a drive signal detected below a first threshold frequency; and
a secondary controller configured to generate a secondary control to control a synchronous rectifier circuit.

### Claim 12 (depends on 11)

The power converter of claim 11, the power converter controller further comprising a communication link coupled to the primary controller and the secondary controller.

### Claim 13 (depends on 12)

The power converter of claim 12, the primary controller and the secondary controller are formed as an integrated circuit.

### Claim 14 (depends on 11)

The power converter of claim 11, the primary controller comprising:
a jitter generator circuit configured to generate the jitter signal, wherein the jitter signal is a modulated jitter signal in response to a drive signal detected below a first threshold frequency; and
a switch controller configured to generate the drive signal to control switching of the power switch in response to a current sense signal representative of a current through the power switch and the jitter signal.

### Claim 15 (depends on 14)

The power converter of claim 14, the jitter generator circuit comprising:
a jitter capacitor coupled to charge by a first current source, the jitter capacitor further coupled to discharge by a second current source, wherein a voltage of the jitter capacitor is the jitter signal;
a first comparator configured to generate a charge signal when the voltage of the jitter capacitor is less than a first voltage reference, the first comparator further configured generate a discharge signal when the voltage of the jitter capacitor is greater than a voltage reference;
a first switch configured to provide a coupling of the first current source and the jitter capacitor in response to the charge signal; and
a second switch configured to provide a coupling of the second current source and the jitter capacitor in response the discharge signal.

### Claim 16 (depends on 15)

The power converter of claim 15, the jitter generator circuit further comprising a timer circuit configured to generate a hold signal in response to the drive signal, wherein the hold signal is configured to prevent a charging of the jitter capacitor in response to the drive signal detected below the first threshold frequency.

### Claim 17 (depends on 16)

The power converter of claim 16, wherein the hold signal is further configured to prevent a discharging of the jitter capacitor in response to the drive signal detected below the first threshold frequency.

### Claim 18 (depends on 16)

The power converter of claim 16, the timer circuit comprising:
a monostable circuit configured to control a charging of a timing capacitor in response to the drive signal; and
a second comparator configured to generate a first state of the hold signal in response a voltage of the timing capacitor being less than a third voltage reference, the second comparator further configured to generate a second state of the hold signal in response to the voltage of the timing capacitor being greater than the third voltage reference.

### Claim 19 (depends on 18)

The power convener of claim 18, wherein the third voltage reference is representative of a defined frequency threshold to modulate a frequency of the jitter signal.

### Claim 20 (depends on 18)

The power converter of claim 18, wherein a capacitance of the timing capacitor is representative of a defined frequency threshold to modulate a frequency of the jitter signal.

### Claim 21 (depends on 12)

The power convener of claim 12, wherein the jitter signal is a modulated jitter signal that is at a lower frequency than the jitter signal.
