# US 11,079,428 B2 · Test circuit and method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,079,428 B2 - Document ID: US11079428B2 - Status: Granted - Kind: B2 - Application number: 16/845,515 - Filed: 2020-04-10 - Published: 2021-06-17 - Granted: 2021-08-03 - Earliest claimed: 2019-12-13 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Co., Ltd. - Inventors: Hsieh-Hung Hsieh; Yen-Jen Chen; Tzu-Jin Yeh - Web page: https://patentgrep.com/patent/US11079428B2 ## CPC - G01R 31/2884: {using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence)} - G01R 31/3004: {Current or voltage test} - G01R 27/28: Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response (in line transmission systems H04B3/46) - G01R 31/2853: {Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections (G01R31/31717 takes precedence; test of chip-to-PCB or lead-to-PCB connections G01R31/66)} - G01R 31/2879: {related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract A test circuit includes an amplifier configured to receive an AC signal, and output an amplified AC signal based on the AC signal, a first detection circuit configured to generate a first DC voltage having a first value based on an amplitude of the AC signal, and a second detection circuit configured to generate a second DC voltage having a second value based on an amplitude of the amplified AC signal. ## Claims ### Claim 1 A test circuit comprising: an amplifier configured to receive an alternating current (AC) signal, and output an amplified AC signal based on the AC signal; a first detection circuit configured to generate a first direct current (DC) voltage having a first value based on an amplitude of the AC signal; and a second detection circuit configured to generate a second DC voltage having a second value based on an amplitude of the amplified AC signal. ### Claim 2 (depends on 1) The test circuit of claim 1, further comprising an oscillator coupled in series with an isolation circuit, wherein the isolation circuit is configured to output the AC signal based on an oscillation signal of the oscillator. ### Claim 3 (depends on 2) The test circuit of claim 2, wherein the oscillator comprises a ring oscillator, and the isolation circuit comprises a low-pass filter. ### Claim 4 (depends on 2) The test circuit of claim 2, wherein the oscillator comprises an inductor-capacitor (LC) resonator, and the isolation circuit comprises a buffer. ### Claim 5 (depends on 1) The test circuit of claim 1, wherein the amplifier comprises a variable-gain amplifier comprising a switched PMOS array coupled to a switched NMOS array. ### Claim 6 (depends on 1) The test circuit of claim 1, wherein the amplifier comprises a common-source configuration of a transistor and an inductive load. ### Claim 7 (depends on 1) The test circuit of claim 1, wherein each of the first and second detection circuits comprises a cascade arrangement of gain stages in series with a low-pass filter. ### Claim 8 (depends on 1) The test circuit of claim 1, wherein the first detection circuit is capacitively coupled to an input terminal of the amplifier, and the second detection circuit is capacitively coupled to an output terminal of the amplifier. ### Claim 9 An integrated circuit (IC) comprising: an amplifier coupled between a first node and a second node; a first detection circuit coupled between the first node and a first pad positioned in a scribe line of a semiconductor wafer; and a second detection circuit coupled between the second node and a second pad positioned in the scribe line, wherein the amplifier is configured to generate an amplified alternating current (AC) signal at the second node based on a variable gain and an AC signal on the first node, the first detection circuit is configured to output a first direct current (DC) voltage to the first pad, the first DC voltage having a first value based on an amplitude of the AC signal, and the second detection circuit is configured to output a second DC voltage to the second pad, the second DC voltage having a second value based on an amplitude of the amplified AC signal. ### Claim 10 (depends on 9) The IC of claim 9, further comprising an oscillator coupled to a third pad positioned in the scribe line, wherein the oscillator is configured to generate the AC signal on the first node responsive to a third DC voltage on the third pad. ### Claim 11 (depends on 9) The IC of claim 9, wherein the amplifier is coupled to a third pad positioned in the scribe line, and the amplifier is configured to control the variable gain based on a third DC voltage on the third pad. ### Claim 12 (depends on 9) The IC of claim 9, wherein the amplifier comprises an inductive load comprising a meander or transmission line positioned in the scribe line. ### Claim 13 (depends on 9) The IC of claim 9, wherein each of the first and second detection circuits comprises: a first common-source stage coupled to an input terminal through a capacitive device; a second common-source stage coupled to the first common-source stage; and a low-pass filter coupled between the second common-source stage and an output terminal. ### Claim 14 A method of measuring an alternating current (AC) amplifier gain, the method comprising: using an AC amplifier to generate an amplified AC signal from a received AC signal; outputting a first DC voltage to a first pad of a semiconductor wafer, the first DC voltage having a first value based on an amplitude of the AC signal; and outputting a second DC voltage to a second pad of the semiconductor wafer, the second DC voltage having a second value based on an amplitude of the amplified AC signal. ### Claim 15 (depends on 14) The method of claim 14, further comprising calculating a gain value from the first and second values. ### Claim 16 (depends on 14) The method of claim 14, further comprising setting a gain of the AC amplifier by providing a third DC voltage to a third pad of the semiconductor wafer. ### Claim 17 (depends on 14) The method of claim 14, further comprising generating the AC signal using a ring oscillator or an inductor-capacitor (LC) resonator. ### Claim 18 (depends on 14) The method of claim 14, further comprising electrically accessing the first and second pads as part of performing a wafer acceptance test (WAT) operation on the semiconductor wafer. ### Claim 19 (depends on 14) The method of claim 14, wherein the AC signal comprises a radio frequency (RF) signal, and the using the AC amplifier to generate the amplified AC signal comprises using a push-pull circuit structure. ### Claim 20 (depends on 14) The method of claim 14, wherein the first and second pads are positioned in a scribe line of the semiconductor wafer, the AC signal comprises a millimeter-wave signal, and the using the AC amplifier to generate the amplified AC signal comprises using a common-source stage with an inductive load, the inductive load comprising a conductive line positioned in the scribe line.