# US 11,079,427 B2 · Inspection device, inspection system, intelligent power module, inspection method, and computer program product

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- Number: US 11,079,427 B2
- Document ID: US11079427B2
- Status: Granted
- Kind: B2
- Application number: 16/117,279
- Filed: 2018-08-30
- Published: 2019-07-18
- Granted: 2021-08-03
- Earliest claimed: 2018-01-18
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Mitsuaki Kato; Akihiro Goryu; Kenji Hirohata
- Web page: https://patentgrep.com/patent/US11079427B2

## CPC

- G01K 7/16: using resistive elements
- G01R 31/2607: {Circuits therefor (G01R31/2642 takes precedence)}
- G01B 7/18: {using change in resistance}
- G01K 7/01: using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence)
- G01L 1/20: by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluids (of piezo-resistive materials G01L1/18); by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress
- G01L 1/2293: {of the semi-conductor type}
- G01R 31/2856: {Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]}
- G01R 31/2874: {related to temperature}
- G01R 31/2881: {related to environmental aspects other than temperature, e.g. humidity or vibrations}
- G06F 30/20: Design optimisation, verification or simulation (optimisation, verification or simulation of circuit designs G06F30/30)
- G06F 30/23: using finite element methods [FEM] or finite difference methods [FDM]
- G06F 30/367: Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
- G01B 7/20: {formed by printed-circuit technique}
- G01K 2217/00: Temperature measurement using electric or magnetic components already present in the system to be measured
- G06F 2119/08: Thermal analysis or thermal optimisation
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/8325: {Silicon carbide}
- H10W 90/00: Package configurations
- G01K: MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR (radiation pyrometry G01J5/00)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G01B: MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An inspection device comprises: a detecting unit that is connected to a plurality of semiconductor chips having mutually different rates of change of electrical resistance with respect to stress loading direction, and that detects an electrical resistance value of each semiconductor chip from electric current flowing in each semiconductor chip; a first memory unit that is used to hold model data meant for converting an electrical resistance value into a characteristic value indicating at least either temperature, or stress, or strain; a converting unit that converts the electrical resistance value of each semiconductor chip as detected by the detecting unit into the characteristic value using the model data held in the first memory unit; and a second memory unit that is used to store the characteristic value, which is obtained by conversion by the converting unit, as time-series data for each of the plurality of semiconductor chips.

## Claims

### Claim 1

An inspection device comprising:
detecting circuitry connected to a plurality of semiconductor chips having mutually different rates of change of electrical resistance with respect to stress loading direction, the detecting circuitry functioning as a detecting unit to detect an electrical resistance value of each semiconductor chip from electric current flowing in each semiconductor chip;
a memory including a first memory unit to hold model data meant for converting an electrical resistance value into a characteristic value indicating at least either temperature, or stress, or strain; and
a hardware processor connected to the memory, the hardware processor functioning as a converting unit to:
convert the electrical resistance value of each semiconductor chip as detected by the detecting circuitry into the characteristic value using the model data held in the first memory unit,
store, in a second memory unit included in the memory, the characteristic value as time-series data for each of the plurality of semiconductor chips, and
read out the time-series data from the second memory unit and output the readout time-series data to the outside of the inspection device,
wherein the model data represents a conversion equation for converting rate of change of the electrical resistance value into the characteristic value,
when ΔRon represents amount of change in electrical resistance of each semiconductor chip,
when Ron represents electrical resistance value in state in which no stress is applied to each semiconductor chip, and
when rp represents change rate in electrical resistance in response to application of stress to each semiconductor chip,
the conversion equation is expressed using Equation (1) given below, and
ΔRon=Ron×rp (1)
when α represents coefficient indicating relationship between temperature and stress-resistance change rate,
when β represents coefficient indicating relationship between stress and resistance change rate,
when γ represents coefficient indicating relationship between temperature and heat stress,
when σo represents external force,
when σf represents mounting stress,
when Ti represents junction temperature, and
when T0 represents reference temperature,
the change rate rp in electrical resistance as given in the Equation (1) is expressed using Equation (2) given below
r
p
=
⁢
r
p
⁡
(
σ
x
,
σ
y
,
T
j
)
=
⁢
{
α
x
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
x
⁢
{
γ
x
⁡
(
T
j
-
T
0
)
+
σ
x
,
f
+
σ
x
,
0
}
+
⁢
{
α
y
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
y
⁢
{
γ
y
⁡
(
T
j
-
T
0
)
+
σ
y
,
f
+
σ
y
,
0
}
.
(
2
)

### Claim 2 (depends on 1)

The inspection device according to claim 1, wherein the memory further includes a third memory unit that is used to hold the electrical resistance value of each semiconductor chip as obtained by the detecting unit as time-series data for each of the plurality of semiconductor chips.

### Claim 3 (depends on 1)

The inspection device according to claim 1, wherein the conversion equation includes, with respect to rate of change of electrical resistance, at least either temperature, or stress component in each direction, or strain component in each direction.

### Claim 4 (depends on 3)

The inspection device according to claim 3, wherein the stress component in each direction includes at least either heat stress component, or mounting stress component, or external force component.

### Claim 5 (depends on 3)

The inspection device according to claim 3, wherein the strain component in each direction includes at least either heat strain component, or strain component attributed to mounting, or strain component attributed to external force.

### Claim 6 (depends on 4)

The inspection device according to claim 4, wherein the conversion equation includes a coefficient indicating relationship between temperature and stress-resistance change rate.

### Claim 7 (depends on 4)

The inspection device according to claim 4, wherein, when the external force and the mounting stress are known, the converting unit identifies the temperature from rate of change of the electrical resistance using the conversion equation.

### Claim 8 (depends on 4)

The inspection device according to claim 4, wherein, when the temperature and the external force are known, the converting unit identifies the mounting stress using the conversion equation.

### Claim 9 (depends on 4)

The inspection device according to claim 4, wherein, when the temperature and the mounting stress are known, the converting unit identifies the external force using the conversion equation.

### Claim 10 (depends on 1)

The inspection device according to claim 1, wherein each semiconductor chip includes a silicon carbide substrate that is so disposed that <11-20> direction thereof is parallel to main stress loading direction.

### Claim 11 (depends on 1)

The inspection device according to claim 1, further comprising an analyzing unit that calculates failure probability of each semiconductor chip using the time-series data of the characteristic values of each of the plurality of semiconductor chips as stored in the second memory unit.

### Claim 12 (depends on 1)

The inspection device according to claim 1, further comprising:
one or more sensors,
wherein the hardware processor is configured to further function as an arithmetic unit to compare information obtained from the one or more sensors with the characteristic values, and correct the model data held in the first memory unit.

### Claim 13 (depends on 12)

The inspection device according to claim 12, wherein
the arithmetic unit has a function of performing an analysis operation using at least either the information obtained from the one or more sensors or the characteristic value, and
the first memory unit is used store parameters to be used by the arithmetic unit at time of performing the analysis operation.

### Claim 14 (depends on 1)

An intelligent power module comprising:
the inspection device according to claim 1; and
the plurality of semiconductor chips according to claim 1, which are embedded as a plurality of semiconductor element formation areas in the intelligent power module having mutually different rates of change of electrical resistance with respect to stress loading direction.

### Claim 15

An inspection method implemented by a computer, the inspection method comprising:
detecting, from electric current flowing in each of a plurality of semiconductor chips having mutually different rates of change of electrical resistance with respect to stress loading direction, an electrical resistance value of each semiconductor chip;
converting the detected electrical resistance value of each semiconductor chip into a characteristic value, which indicates at least either temperature, or stress, or strain, using model data meant for converting an electrical resistance value into the characteristic value;
storing, in a memory of the computer, the characteristic value, which is obtained by conversion, as time-series data for each of the plurality of semiconductor chips; and
reading out the time-series data from the memory and outputting the readout time-series data to the outside of the computer,
wherein the model data represents a conversion equation for converting rate of change of the electrical resistance value into the characteristic value,
when ΔRon represents amount of change in electrical resistance of each semiconductor chip,
when Ron represents electrical resistance value in state in which no stress is applied to each semiconductor chip, and
when rp represents change rate in electrical resistance in response to application of stress to each semiconductor chip,
the conversion equation is expressed using Equation (1) given below, and
ΔRon=Ron×rp (1)
when α represents coefficient indicating relationship between temperature and stress-resistance change rate,
when β represents coefficient indicating relationship between stress and resistance change rate,
when γ represents coefficient indicating relationship between temperature and heat stress,
when σo represents external force,
when σf represents mounting stress,
when Tj represents junction temperature, and
when T0 represents reference temperature,
the change rate rp in electrical resistance as given in the Equation (1) is expressed using Equation (2) given below
r
p
=
⁢
r
p
⁡
(
σ
x
,
σ
y
,
T
j
)
=
⁢
{
α
x
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
x
⁢
{
γ
x
⁡
(
T
j
-
T
0
)
+
σ
x
,
f
+
σ
x
,
0
}
+
⁢
{
α
y
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
y
⁢
{
γ
y
⁡
(
T
j
-
T
0
)
+
σ
y
,
f
+
σ
y
,
0
.
(
2
)

### Claim 16

A computer program product having a non-transitory computer readable medium including programmed instructions, wherein the instructions, when executed by a processor installed in an inspection device that is connected to a plurality of semiconductor chips having mutually different rates of change of electrical resistance with respect to stress loading direction, cause the processor to perform:
detecting, from electric current flowing in each of the plurality of semiconductor chips, an electrical resistance value of each semiconductor chip;
converting the detected electrical resistance value of each semiconductor chip into a characteristic value, which indicates at least either temperature, or stress, or strain, using model data meant for converting an electrical resistance value storing, in a memory of the inspection device, the characteristic value, which is obtained by conversion, as time-series data for each of the plurality of semiconductor chips into the characteristic value; and
reading out the time-series data from the memory and outputting the readout time-series data to the outside of the inspection device,
wherein the model data represents a conversion equation for converting rate of change of the electrical resistance value into the characteristic value,
when ΔRon represents amount of change in electrical resistance of each semiconductor chip,
when Ron represents electrical resistance value in state in which no stress is applied to each semiconductor chip, and
when rp represents change rate in electrical resistance in response to application of stress to each semiconductor chip,
the conversion equation is expressed using Equation (1) given below, and
ΔRon=Ron×rp (1)
when α represents coefficient indicating relationship between temperature and stress-resistance change rate,
when β represents coefficient indicating relationship between stress and resistance change rate,
when γ represents coefficient indicating relationship between temperature and heat stress,
when σo represents external force,
when σf represents mounting stress,
when Tj represents junction temperature, and
when T0 represents reference temperature,
the change rate rp in electrical resistance as given in the Equation (1) is expressed using Equation (2) given below
r
p
=
⁢
r
p
⁡
(
σ
x
,
σ
y
,
T
j
)
=
⁢
{
α
x
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
x
⁢
{
γ
x
⁡
(
T
j
-
T
0
)
+
σ
x
,
f
+
σ
x
,
0
}
+
⁢
{
α
y
⁡
(
T
j
-
T
0
)
+
1
}
⁢
β
y
⁢
{
γ
y
⁡
(
T
j
-
T
0
)
+
σ
y
,
f
+
σ
y
,
0
.
(
2
)