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US 11,073,855 B2Granted
Capacitor-based power converter with buck converter
AssigneeMicron Technology, Inc.
InventorMatthew D. Rowley
Life of this patent
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Abstract
Various embodiments described herein provide a system that uses a capacitor-based power converter to generate a gate voltage (e.g., boot strap voltage) for a buck converter. According to various embodiments described herein, the capacitor-based power converter includes at least one of a combination of a capacitive voltage divider circuit with a low-dropout (LDO) regulator, or a combination of a capacitive doubler circuit with an LDO regulator, to generate the gate voltage for the buck converter.
Claims16
A system comprising:
- a capacitor-based power converter that comprises a power supply input, a capacitive circuit, coupled to the power supply input, a low-dropout regulator coupled to the capacitive circuit, and a power converter voltage output coupled to the low-dropout regulator, the capacitive circuit comprising a capacitive voltage doubler circuit and a capacitive voltage divider circuit, the capacitive voltage doubler circuit being separate from the capacitive voltage divider circuit;
- and
- a buck converter coupled to the power converter voltage output of the capacitor-based power converter, the buck converter comprising a supply voltage input, a ground input, and a buck converter voltage output, the supply voltage input providing a first voltage, the power supply input providing a second voltage, and the capacitive circuit generating a third voltage for the low-dropout regulator based on the first voltage being lower or higher than the second voltage.
A system comprising:
- a memory device;
- a power interface to receive power from a host system;
- a power component that receives power from the power interface;
- and
- a processing device coupled to the memory device and the power component, the power component comprising:
- a capacitor-based power converter that comprises a power supply input, a capacitive circuit coupled to the power supply input, a low-dropout regulator coupled to the capacitive circuit, and a power converter voltage output coupled to the low-dropout regulator, the capacitive circuit comprising a capacitive voltage doubler circuit and a capacitive voltage divider circuit, the capacitive voltage doubler circuit being separate from the capacitive voltage divider circuit;
- and
- a buck converter coupled to the power converter voltage output of the capacitor-based power converter, the buck converter comprising a supply voltage input, a ground input, and a buck converter voltage output, the processing device receiving power from the buck converter voltage output, the supply voltage input providing a first voltage, the power supply input providing a second voltage, and the capacitive circuit generating a third voltage for the low-dropout regulator based on the first voltage being lower or higher than the second voltage.
5 more elements
A method comprising:
- receiving, at a memory sub-system, power from a host system via a physical interface of the memory sub-system;
- providing at least a portion of the power from the host system to a power component of the memory sub-system, the power component comprising:
- a capacitor-based power converter that comprises a power supply input, a capacitive circuit coupled to the power supply input, a low-dropout regulator coupled to the capacitive circuit, and a power converter voltage output coupled to the low-dropout regulator, the capacitive circuit comprising a capacitive voltage doubler circuit and a capacitive voltage divider circuit, the capacitive voltage doubler circuit being separate from the capacitive voltage divider circuit;
- and
- a buck converter coupled to the power converter voltage output of the capacitor-based power converter, the buck converter comprising a supply voltage input, a ground input, and a buck converter voltage output, the supply voltage input providing a first voltage, the power supply input providing a second voltage, and the capacitive circuit generating a third voltage for the low-dropout regulator based on the first voltage being lower or higher than the second voltage;
- and
- providing, from the buck converter voltage output, voltage to at east one component of the memory sub-system.
4 more elements
Dependencies are inferred from the claim text.