Control device and communication device

A control device, comprising:

• a communication unit;
• one or a plurality of functional units;
• and
• a communication line that has a plurality of channels independent of each other and connects the communication unit and the one or the plurality of functional units,
• wherein the communication unit comprises:
• an arithmetic processing part in which a processor executes one or a plurality of tasks;
• a communication circuit that handles transmission and reception of communication frames via the communication line;
• and
• a control circuit connected to the arithmetic processing part and the communication circuit,
• wherein the control circuit comprises:
• a first direct memory access (DMA) core for accessing the arithmetic processing part;
• a second DMA core for accessing the communication circuit;
• and
• a controller that gives commands to the first DMA core and the second DMA core sequentially according to a predefined descriptor table in response to a trigger from the arithmetic processing part;
• and
• an activation unit configured to selectively activate a descriptor table designated from among a plurality of descriptor tables set with priorities different from each other in advance, wherein
• in the arithmetic processing part, a plurality of tasks set with the priorities different from each other are executed, and
• the communication unit is configured to execute
• a first task of sending out, in a first cycle, a first communication frame for executing at least one of transmission of data collected by the functional units to the communication unit and transmission of data held by the communication unit to the functional units via a first channel among the plurality of channels and
• a second task of sending out, in a second cycle different from the first cycle, a second communication frame for executing at least one of transmission of the data collected by the functional units to the communication unit and transmission of the data held by the communication unit to the functional units via a second channel among the plurality of channels, wherein the first task and the second task are among the plurality of tasks, and a priority of the first task is higher than a priority of the second task,
• each of the plurality of descriptor tables is stored in the memory of the arithmetic processing part or the memory area of the control circuit according to a priority of the corresponding task, and
• a descriptor table corresponding to the first task is stored in the memory area of the control circuit and a descriptor table corresponding to the second task is stored in the memory of the arithmetic processing part.