Multiplier circuit
AssigneeArm Limited
InventorsMichael Alexander Kennedy, Neil Burgess, Zichao Xie, Chiloda Ashan Senarath Pathirane
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Abstract
A multiplier circuit is described in which sub-products calculated in a first stage of a carry-save adder (CSA) network are output early, processed by applying a processing function, and re-injected into a subsequent stage of the CSA network to add the processed sub-products. This allows a CSA network provided for multiplication operations to be reused for operations which require sub-products to be processed and added, such as floating-point dot product operations performed on floating-point values represented in bfloatl6 format.
Claims20
A multiplier circuit comprising:
- a carry-save adder (CSA) network comprising a plurality of carry-save adders to perform partial product additions to reduce a plurality of partial products to a redundant result value represented using a carry-save representation, the CSA network comprising:
- a first stage of carry-save adders to perform a first subset of the partial product additions using selected portions of the partial products to generate a plurality of sub-products;
- and
- at least one further stage of carry-save adders to perform a further subset of the partial product additions using the plurality of sub-products generated by the first stage and remaining portions of the partial products, to generate the redundant result value;
- sub-product processing circuitry to apply a processing function to the plurality of sub-products generated by the first stage of carry-save adders, to generate processed sub-products represented using the carry-save representation, said processing function comprising at least one operation other than addition;
- and
- input control circuitry to inject the processed sub-products as inputs to a subset of carry-save adders of said at least one further stage, to provide a sum-of-processed-sub-products mode in which the redundant result value generated by said at least one further stage represents a sum of the processed sub-products generated by the sub-product processing circuitry.
A multiplier circuit comprising:
- means for carry-save adding, comprising a plurality of carry-save adders to perform partial product additions to reduce a plurality of partial products to a redundant result value represented using a carry-save representation, the means for carry-save adding comprising:
- a first stage of carry-save adders to perform a first subset of the partial product additions using selected portions of the partial products to generate a plurality of sub-products;
- and
- at least one further stage of carry-save adders to perform a further subset of the partial product additions using the plurality of sub-products generated by the first stage and remaining portions of the partial products, to generate the redundant result value;
- means for applying a processing function to the plurality of sub-products generated by the first stage of carry-save adders, to generate processed sub-products represented using the carry-save representation, said processing function comprising at least one operation other than addition;
- and
- means for injecting the processed sub-products as inputs to a subset of carry-save adders of said at least one further stage, to provide a sum-of-processed-sub-products mode in which the redundant result value generated by said at least one further stage represents a sum of the processed sub-products generated by said means for applying the processing function.
A method for a multiplier circuit comprising a carry-save adder (CSA) network comprising a plurality of carry-save adders to perform partial product additions to reduce a plurality of partial products to a redundant result value represented using a carry-save representation, the CSA network comprising:
- a first stage of carry-save adders to perform a first subset of the partial product additions using selected portions of the partial products to generate a plurality of sub-products;
- and at least one further stage of carry-save adders to perform a further subset of the partial product additions using the plurality of sub-products generated by the first stage and remaining portions of the partial products, to generate the redundant result value;
- the method comprising:
- controlling the first stage of carry-save adders to perform the first subset of the partial product additions;
- controlling sub-product processing circuitry to apply a processing function to the plurality of sub-products generated by the first stage of carry-save adders, to generate processed sub-products represented using the carry-save representation, said processing function comprising at least one operation other than addition;
- and
- injecting the processed sub-products as inputs to a subset of carry-save adders of said at least one further stage, to provide a sum-of-processed-sub-products mode in which the redundant result value generated by said at least one further stage represents a sum of the processed sub-products generated by the sub-product processing circuitry.
Dependencies are inferred from the claim text.