Regulator with reduced power consumption using clamp circuit

A regulator comprising:

• a first transistor connected between an input terminal and an output terminal;
• a feedback circuit configured to control a control voltage of a control electrode of the first transistor such that a voltage of the output terminal approaches a target voltage according to a feedback voltage proportional to the voltage of the output terminal;
• a second transistor having a first terminal connected to the input terminal and a control electrode to which the control voltage is applied in common with the first transistor;
• and
• a clamp circuit configured to set a second terminal of the second transistor to a voltage determined by the voltage of the output terminal,
• wherein the clamp circuit is connected to a ground node,
• wherein when a voltage of the input terminal is equal to the voltage of the output terminal, no current flows from the first terminal of the second transistor to the ground node,
• wherein the first transistor and the second transistor are P-channel field effect transistors whose sources are connected to each other, and
• wherein the clamp circuit includes:
• a third transistor, which is a PNP transistor having an emitter connected to the output terminal, and having a base and a collector that are connected to a current source;
• and
• a fourth transistor, which is a PNP transistor having an emitter connected to a drain of the second transistor, and having a base connected to the base and the collector of the third transistor.