Integrated circuit with laminated magnetic core inductor and magnetic flux closure layer

A structure comprising:

• a semiconductor integrated circuit comprising a multilevel wiring network disposed on a substrate;
• an inductor integrated into said multilevel wiring network, said inductor comprising a planar laminated magnetic core and a conductive winding that turns around in a generally spiral manner on the outside of said planar laminated magnetic core, said planar laminated magnetic core comprising an alternating sequence of a magnetic layer and a non-magnetic layer;
• a first magnetic flux closure layer disposed within about 100 μm of a face of the planar laminated magnetic core;
• and
• a second magnetic flux closure layer disposed within about 100 μm of an opposing face of the planar laminated magnetic core, the face and the opposing face parallel to a principal plane of the planar laminated magnetic core, wherein:
• the planar laminated magnetic core and the first magnetic flux closure layer are configured so that a first magnetic flux passes through a first magnetic layer in the planar laminated magnetic core in a first direction that is parallel to a first hard axis of magnetization of the first magnetic layer and the first magnetic flux passes through the first magnetic flux closure layer in a second direction that is parallel to a second hard axis of magnetization of the first magnetic flux closure layer, and
• the planar laminated magnetic core and the second magnetic flux closure layer are configured so that a second magnetic flux passes through a second magnetic layer in the planar laminated magnetic core in a third direction that is parallel to a third hard axis of magnetization of the second magnetic layer and the second magnetic flux passes through the second magnetic flux closure layer in a fourth direction that is parallel to a fourth hard axis of magnetization of the second magnetic flux closure layer.