Two-terminal integrated circuits with time varying voltage-current characteristics including phased-locked power supplies

A two-terminal IC chip, the chip comprising:

• a first chip terminal;
• a second chip terminal;
• a switch;
• and
• a resistor coupled to the switch;
• wherein:
• a first terminal voltage is a voltage of the first chip terminal;
• a second terminal voltage is a voltage of the second chip terminal;
• and
• a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage;
• wherein the chip is configured to:
• allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude;
• have a first relationship between the chip voltage and the chip current at a first time;
• and
• have a second relationship between the chip voltage and the chip current at a second time, the second relationship being different from the first relationship, the second time being different from the first time;
• wherein:
• the chip is an integrated circuit;
• and
• the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal;
• wherein the switch is configured to:
• receive a drive signal;
• and
• be opened or closed in response to the drive signal;
• wherein the chip is further configured to:
• in response to the switch being opened, change the chip current from being larger than zero to being equal to zero in magnitude;
• and
• in response to the switch being closed, change the chip current from being equal to zero to being larger than zero in magnitude.

A two-terminal IC chip, the chip comprising:

• a first chip terminal;
• and
• a second chip terminal;
• wherein:
• a first terminal voltage is a voltage of the first chip terminal;
• a second terminal voltage is a voltage of the second chip terminal;
• and
• a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage;
• wherein the chip is configured to:
• allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude;
• have a first relationship between the chip voltage and the chip current at a first time;
• and
• have a second relationship between the chip voltage and the chip current at a second time, the second relationship being different from the first relationship, the second time being different from the first time;
• wherein:
• the chip is an integrated circuit;
• and
• the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal;
• wherein the first chip terminal is coupled to a first winding terminal of an inductive winding and a first diode terminal of a diode, the inductive winding further including a second winding terminal, the diode further including a second diode terminal, a series of one or more light emitting diodes being coupled to the second winding terminal and the second diode terminal, the second winding terminal and the second diode terminal being configured to receive a rectified AC voltage.

A two-terminal IC chip, the chip comprising:

• a first chip terminal;
• a second chip terminal;
• a controlled switch configured to receive a control signal;
• and
• a power supply coupled to the controlled switch;
• wherein:
• a first terminal voltage is a voltage of the first chip terminal;
• a second terminal voltage is a voltage of the second chip terminal;
• and
• a chip voltage is equal to a difference between the first terminal voltage and the second terminal voltage;
• wherein the chip is configured to:
• allow a chip current to flow into the chip at the first chip terminal and out of the chip at the second chip terminal, or to flow into the chip at the second chip terminal and out of the chip at the first chip terminal, the chip current being larger than or equal to zero in magnitude;
• have a first relationship between the chip voltage and the chip current at a first time;
• and
• have a second relationship between the chip voltage and the chip current at a second time, the second relationship being different from the first relationship, the second time being different from the first time;
• wherein:
• the chip is an integrated circuit;
• and
• the chip does not include any additional chip terminal other than the first chip terminal and the second chip terminal;
• wherein the controlled switch is further configured to be:
• closed during a first time duration in response to the control signal;
• and
• open during a second time duration in response to the control signal;
• wherein the power supply is configured to:
• in response to the controlled switch being closed, receive a first power through the controlled switch and store the received first power during the first time duration;
• and
• in response to the controlled switch being open, not store any additional power and not allow stored power to leak out through the controlled switch during the second time duration;
• wherein the power supply is further configured to output a second power during the first time duration and the second time duration.