Processing system, related integrated circuit, device and method

A processing system comprising:

• a first processing unit driven by a first clock signal, the first processing unit having a first input/output and a separate second input/output;
• a second processing unit having a first input/output and a separate second input/output, wherein a frequency of the second clock signal is less than a frequency of the first clock signal;
• a cryptographic coprocessor communicatively coupled between the first input/output of the first processing unit and the first input/output of the second processing unit, wherein the first processing unit, the second processing unit and the cryptographic coprocessor are in close proximity within the processing system;
• a transmission system coupled between the second input/output of the first processing unit and the second input/output of the second processing unit;
• a non-volatile memory configured to store a first cryptographic key, wherein the second processing unit is configured to read the first cryptographic key from the non-volatile memory and send the first cryptographic key to the cryptographic coprocessor;
• wherein the cryptographic coprocessor comprises:
• a key storage memory for storing a cryptographic key;
• a first interface configured to receive source data to be processed directly from the first input/output of the first processing unit;
• a hardware cryptographic engine driven with the first clock signal and is configured to process the source data as a function of the cryptographic key stored in the key storage memory;
• a second interface configured to receive the first cryptographic key directly from the first input/output of the second processing unit;
• and
• a hardware key management circuit driven with a second clock signal and is configured to store the first cryptographic key in the key storage memory.

A method of operating a local processing system, the method comprising:

• communicating information from a first processing unit of the local processing system directly to a second processing unit of the local processing system, the first processing unit being a non-secure processing unit and the second processing unit being a secured processing unit, wherein the first processing unit is driven by a first clock signal and the second processing unit is driven by a second clock signal, the second clock signal having a frequency that is less than a frequency of the first clock signal;
• providing source data to a first interface of the local processing system via the first processing unit of the local processing system;
• providing a first cryptographic key to a second interface of the local processing system via the second processing unit of the local processing system;
• processing the source data by selectively encrypting or decrypting the source data using the first cryptographic key to generate processed source data via a hardware cryptography engine, wherein the hardware cryptography engine is driven with the first clock signal;
• and
• reading the processed source data from the first interface of the local processing system via the first processing unit of the local processing system.