Vertical memory devices
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-Hwan Lee, Yong-Seok Kim, Jun-Hee Lim, Kohji Kanamori
Life of this patent
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Abstract
A vertical memory device includes gate electrodes on a substrate and a first structure. The gate electrodes may be spaced apart from each other in a first direction perpendicular to an upper surface of the substrate. The first structure extends through the gate electrodes in the first direction, and includes a channel and a variable resistance structure sequentially stacked in a horizontal direction parallel to the upper surface of the substrate. The variable resistance structure may include quantum dots (QDs) therein.
Claims20
A vertical memory device comprising:
- gate electrodes on a substrate, the gate electrodes being spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate;
- and
- a first structure extending through the gate electrodes in the first direction and including a channel and a variable resistance structure sequentially stacked in a horizontal direction substantially parallel to the upper surface of the substrate,
- wherein the variable resistance structure includes quantum dots (QDs) therein.
A vertical memory device comprising:
- gate electrodes on a substrate, the gate electrodes being spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate;
- and
- a first structure extending through the gate electrodes in the first direction and including a channel and a variable resistance structure sequentially stacked in a horizontal direction substantially parallel to the upper surface of the substrate,
- wherein the variable resistance structure includes a plurality of depletion regions spaced apart from each other in the first direction therein.
A vertical memory device comprising:
- gate electrodes on a substrate, the gate electrodes being spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate;
- and
- a first structure extending through the gate electrodes in the first direction and including a gate insulation pattern, a current path pattern and an information storage structure sequentially stacked in a horizontal direction substantially parallel to the upper surface of the substrate from each of the gate electrodes,
- wherein the information storage structure includes quantum dots (QDs) therein, and
- wherein the current path pattern includes a semiconductor material.
Dependencies are inferred from the claim text.