Techniques for fabricating charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) devices

A charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:

• a charge balanced (CB) layer defined within a first epitaxial (epi) layer and having a first conductivity type, wherein the CB layer includes a plurality of charge balanced (CB) regions having a second conductivity type;
• a device layer defined in a second epi layer and having the first conductivity type disposed on the CB layer, wherein the device layer includes:
• a source region having the first conductivity type disposed at an upper surface of the second epi layer;
• a base region having the second conductivity type disposed below the source region;
• a body region having the second conductivity type that extends from the upper surface of the second epi layer, through the source region, and into the base region;
• a trench feature that extends from the upper surface of the second epi layer, through the source region and the base region, to a depth below the base region;
• and
• a shield region having the second conductivity type at least partially disposed at a bottom surface of the trench feature;
• a source contact disposed directly on the source region and the body region at the upper surface of the device layer;
• and
• a charge balanced (CB) bus region having the second conductivity type that extends between the plurality of CB regions of the CB layer and electrically couples the plurality of CB regions to the source contact via the base region and the body region.