Memory cells and integrated structures
AssigneeMicron Technology, Inc.
InventorsAnkit Sharma, Akira Goda
Life of this patent
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Abstract
A memory cell comprises, in the following order, channel material, a charge-passage structure, programmable material, a charge-blocking region, and a control gate. The charge-passage structure comprises a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material. The first and third materials comprise SiO2. The second material has a thickness of 0.4 nanometer to 5.0 nanometers and comprises SiOx, where “x” is less than 2.0 and greater than 0. Other embodiments are disclosed.
Claims45
A memory cell, comprising, in the following order:
- channel material;
- a charge-passage structure;
- programmable material;
- a charge-blocking region;
- a control gate;
- and
- the charge-passage structure comprising:
- a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material;
- the first and third materials comprising SiO2;
- and
- the second material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising SiOx, where “x” is less than 2.0 and greater than 0.
An integrated structure, comprising:
- a vertical stack comprising vertically-alternating levels of conductive material and insulator material;
- channel material extending elevationally along the vertical stack;
- a charge-passage structure laterally outward of and extending elevationally along the channel material, the charge-passage structure comprising:
- a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material;
- the first and third materials comprising SiO2;
- and
- the second material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising SiOx, where “x” is less than 2.0 and greater than 0;
- programmable material laterally outward of the charge-passage structure and within the levels comprising conductive material;
- and
- a charge-blocking region within the levels comprising conductive material, the charge-blocking region being laterally outward of the charge-passage structure and laterally inward of the conductive material.
A memory cell, comprising, in the following order:
- channel material;
- a charge-passage structure;
- programmable material;
- a charge-blocking region;
- a control gate;
- and
- the charge-passage structure comprising:
- a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material;
- the first material comprising SiOx where “x” is no greater than 2.0;
- the third material comprising SiO2;
- and
- the second material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising elemental-form silicon.
An integrated structure, comprising:
- a vertical stack comprising vertically-alternating levels of conductive material and insulator material;
- channel material extending elevationally along the vertical stack;
- a charge-passage structure laterally outward of and extending elevationally along the channel material, the charge-passage structure comprising:
- a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material;
- the first material comprising SiOx where “x” is no greater than 2.0;
- the third material comprising SiO2;
- and
- the second material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising elemental-form silicon;
- programmable material laterally outward of the charge-passage structure and within the levels comprising conductive material;
- and
- a charge-blocking region within the levels comprising conductive material, the charge-blocking region being laterally outward of the charge-passage structure and laterally inward of the conductive material.
A memory cell, comprising, in the following order:
- channel material;
- a charge-passage structure;
- programmable material;
- a charge-blocking region;
- a control gate;
- and
- the charge-passage structure comprising:
- a first material closest to and directly against the channel material and a second material furthest from and directly against the first material;
- the first material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising SiOx, where “x” is less than 2.0 and greater than 0;
- and
- the second material comprises SiO2.
A memory cell, comprising, in the following order:
- channel material;
- a charge-passage structure;
- programmable material;
- a charge-blocking region;
- a control gate;
- and
- the charge-passage structure comprising:
- a first material closest to and directly against the channel material and a second material furthest from and directly against the first material;
- the first material having a thickness of 0.4 nanometer to 5.0 nanometers and comprising elemental-form silicon;
- and
- the second material comprises SiO2.
A memory cell, comprising, in the following order:
- channel material;
- a charge-passage structure;
- programmable material;
- a charge-blocking region;
- a control gate;
- and
- the charge-passage structure comprising:
- a first material closest to the channel material, a third material furthest from the channel material, and a second material between the first material and the third material;
- the first material comprises SiOx1Ny1;
- the second material comprises SiOx2Ny2;
- the third material comprises SiOx3Ny3;
- x1, x2, x3, y1, y2, y3 are each greater than 0;
- x1 is less than 2;
- y1 is less than 1;
- and
- x3<x2<x1 and y3>y2>y1.
Dependencies are inferred from the claim text.