Semiconductor device and semiconductor memory device

A semiconductor device comprising:

• a semiconductor layer having a first face and a second face opposite to the first face;
• a gate electrode;
• a gate insulating layer provided between the first face and the gate electrode;
• a pair of first p-type impurity regions provided in the semiconductor layer on both sides of the gate electrode, the first p-type impurity regions containing boron, carbon, and germanium, the first p-type impurity regions having a bond structure of boron and carbon, the first p-type impurity regions having a first boron concentration and a first depth in a direction from the first face toward the second face, the first p-type impurity regions having a distance between the first p-type impurity regions being a first distance, and each of the first p-type impurity regions including a portion having a carbon concentration higher than a germanium concentration;
• and
• a pair of second p-type impurity regions provided in the semiconductor layer on both sides of the gate electrode, the second p-type impurity regions containing boron, the second p-type impurity regions having a second boron concentration lower than the first boron concentration, the second p-type impurity regions having a second depth smaller than the first depth in the direction from the first face toward the second face, the second p-type impurity regions having a distance between the second p-type impurity regions being a second distance shorter than the first distance, and the second p-type impurity regions having a germanium concentration lower than the germanium concentration of the first p-type impurity regions.