Semiconductor device including multi-stack structure
AssigneeSamsung Electronics Co., Ltd.
InventorSeok Cheon Baek
Life of this patent
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Abstract
A semiconductor device includes a substrate having a cell region and a connection region adjacent to the cell region. A lower stack structure and an upper stack structure are disposed on the substrate. A channel structure is provided to pass through the upper stack structure and the lower stack structure. A distance between a lower extension line portion included in an uppermost one of a plurality of lower interconnection layers and an upper extension line portion included in a lowermost one of a plurality of upper interconnection layers is less than a distance between a lower gate electrode portion included in the uppermost one of the plurality of lower interconnection layers and an upper gate electrode portion included in the lowermost one of the plurality of upper interconnection layers.
Claims20
A semiconductor device comprising:
- a substrate having a cell region and a connection region adjacent to the cell region;
- a lower stack structure including a plurality of lower insulating layers and a plurality of lower conductive layers, the plurality of lower insulating layers and the plurality of lower conductive layers being alternately stacked on each other on the substrate, each of the plurality of lower conductive layers including,
- a lower gate electrode portion in the cell region, and
- a lower extension line portion in the connection region, the lower extension line portion extending from the lower gate electrode portion;
- an upper stack structure including a plurality of upper insulating layers and a plurality of upper conductive layers, the plurality of upper insulating layers and the plurality of upper conductive layers being alternately stacked on each other on the lower stack structure, each of the plurality of upper conductive layers including,
- an upper gate electrode portion in the cell region, and
- an upper extension line portion in the connection region, the upper extension line portion extending from the upper gate electrode portion, a first distance between an uppermost surface of the lower gate electrode portion and a lowermost surface of the upper gate electrode portion being greater than a second distance between an uppermost surface of the lower extension line portion and a lowermost surface of the upper extension line portion, and a third distance between the substrate and a lowermost surface of the lower gate electrode portion being less than a fourth distance between the substrate and a lowermost surface of the lower extension line portion;
- and
- a channel structure passing through the upper stack structure and the lower stack structure.
A semiconductor device comprising:
- a substrate having a cell region and a connection region adjacent to the cell region;
- a lower stack structure including a plurality of lower insulating layers and a plurality of lower interconnection layers alternately stacked on each other on the substrate, each of the plurality of lower interconnection layers including,
- a lower electrode portion in the cell region, and
- a lower extension line portion in the connection region, the lower extension line portion extending from the lower electrode portion;
- an upper stack structure including a plurality of upper insulating layers and a plurality of upper interconnection layers alternately stacked on each other on the lower stack structure, each of the plurality of upper interconnection layers including,
- an upper electrode portion in the cell region, and
- an upper extension line portion in the connection region, the upper extension line portion extending from the upper electrode portion;
- and
- a channel structure passing through the upper stack structure and the lower stack structure,
- wherein at least one of the lower extension line portion of an uppermost one of the plurality of lower interconnection layers or the upper extension line portion of an lowermost one of the plurality of upper interconnection layers include a first inclined region near the cell region.
Dependencies are inferred from the claim text.