Process enhancement using double sided epitaxial on substrate

An integrated circuit (IC) device comprising:

• a semiconductor substrate having a first conductivity type and a first dopant concentration located between first and second surface semiconductor layers having the first conductivity type and a second different dopant concentration;
• a doped region having a second opposite conductivity type disposed within the first surface semiconductor layer;
• and
• a dielectric isolation structure surrounding and touching the doped region,
• wherein the second surface semiconductor layer is free of any regions of the second conductivity type.

A semiconductor device comprising:

• a semiconductor substrate having a first conductivity type and a first thickness, a first side, and a second side opposite the first side;
• a first epitaxial layer having the first conductivity type disposed on the first side of the semiconductor substrate, the first epitaxial layer having a first surface and including first, second and third doped regions having a second opposite conductivity type;
• a second epitaxial layer having the first conductivity type disposed on the second side of the semiconductor substrate, the second layer having a second surface opposite the first surface;
• a first transistor formed in or over the first doped region;
• and
• a second transistor formed at least partially within the first epitaxial layer outside the first doped region, the second transistor including the second and third doped regions;
• an isolation structure formed in the first epitaxial layer between the first and second transistors,
• wherein the second epitaxial layer has a uniform homogeneous surface over an entirety of the second surface.