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US 11,056,471 B2Granted
Semiconductor device and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJing-Cheng Lin, Po-Hao Tsai, Li-Hui Cheng, Porter Chen
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Abstract
A semiconductor device and method for providing an enhanced removal of heat from a semiconductor die within an integrated fan out package on package configuration is presented. In an embodiment a metal layer is formed on a backside of the semiconductor die, and the semiconductor die along and through vias are encapsulated. Portions of the metal layer are exposed and a thermal die is connected to remove heat from the semiconductor die.
Claims20
A method comprising:
- receiving an integrated circuit (IC) package that includes:
- a mold encapsulating an IC device, a through via structure, and a metal layer disposed over a backside of the IC device, wherein the mold has a first side and a second side that is opposite the first side and the metal layer is a portion of a thermal path for removing heat from the IC device,
- a redistribution layer disposed on the first side of the mold, wherein the redistribution layer is coupled to the through via structure and a front side of the IC device, and
- a patterned polymer layer disposed on the second side of the mold, wherein the patterned polymer layer has an opening exposing a portion of the metal layer;
- and
- bonding a thermal structure to the metal layer of the IC device via a thermally conductive material that fills the opening of the patterned polymer layer.
3 more elements
A method comprising:
- forming a patterned metal layer over a surface of a polymer layer;
- attaching a first surface of a device to the surface of the polymer layer, wherein the first surface of the device is defined by a metal layer that dissipates heat from the device;
- forming a molding layer over the surface of the polymer layer, wherein the molding layer encapsulates the device and the patterned metal layer;
- forming a redistribution layer over the molding layer, a second surface of the device, and the patterned metal layer, wherein the second surface of the device is opposite the first surface of the device;
- and
- laser drilling a first opening in the polymer layer that exposes the patterned metal layer and a second opening in the polymer layer that exposes the metal layer.
3 more elements
A method comprising:
- forming a polymer layer over a carrier substrate, wherein a first polymer layer surface of the polymer layer is disposed on the carrier substrate;
- forming a through via structure over a second polymer layer surface of the polymer layer, wherein the second polymer layer surface is opposite the first polymer layer surface;
- placing a first side of a first IC chip on the second polymer layer surface in a first area of the polymer layer and a first side of a second IC chip on the second polymer layer surface in a second area of the polymer layer, wherein the through via structure defines the first area of the polymer layer and the second area of the polymer layer;
- forming a mold over the second polymer layer surface that encapsulates the first IC chip, the second IC chip, and the through via structure;
- forming a redistribution layer over the mold, wherein the redistribution layer is disposed over a second side of the first IC chip and a second side of the second IC chip, wherein the second side of the first IC chip is opposite the first side of the first IC chip and the second side of the second IC chip is opposite the first side of the second IC chip;
- removing the carrier substrate to expose the first polymer layer surface;
- patterning the polymer layer from the first polymer layer surface to form a first opening that extends through the polymer layer and exposes a first metal layer at the first side of the first IC chip and a second opening that extends through the polymer layer and exposes a second metal layer at the first side of the second IC chip, wherein the first metal layer is a portion of a first thermal path for removing heat from the first IC chip and the second metal layer is a portion of a second thermal path for removing heat from the second IC chip;
- and
- performing a singulation process that provides a first IC package that includes the first IC chip and a second IC package that includes the second IC chip.
6 more elements
Dependencies are inferred from the claim text.