Semiconductor apparatus

A semiconductor apparatus comprising:

• a base plate;
• a metal plate disposed on the base plate;
• a bonding material disposed between the base plate and the metal plate to be in surface-to-surface contact with the base plate and the metal plate to bond the metal plate to the base plate;
• an insulating plate disposed on the metal plate;
• a circuit member disposed on the insulating plate to be in surface-to-surface contact with the insulating plate;
• a semiconductor device mounted on the circuit member;
• and
• an encapsulating material covering the metal plate, the bonding material, the insulating plate, the circuit member, and the semiconductor device to encapsulate an area over the base plate,
• wherein a bottom surface area of the metal plate along an outer perimeter of the metal plate is not covered with the bonding material,
• wherein the base plate has a groove-shape recess that is disposed along the outer perimeter of the metal plate to face toward the bottom surface area,
• wherein the recess has an area having a first depth and a deeper area deeper than the first depth, and the deeper area is disposed beside an inner-side sidewall of the recess when an inner side is defined as being situated further inside, away from the outer perimeter of the metal plate,
• wherein at least a portion of the deeper area has the bonding material disposed therein,
• wherein the inner-side sidewall and an upper surface of the base plate placed in contact with the bonding material are configured to meet each other at an obtuse angle,
• wherein the deeper area is configured such that a width thereof increases toward an upper end thereof,
• wherein a depth of the deeper area from the area having the first depth is configured to be less than or equal to a thickness of the bonding material,
• wherein the bonding material is solder, and the inner-side sidewall is provided with a plating layer that has higher solder wettability than a surface of the base plate facing the metal plate,
• wherein at least a portion of the bottom surface area of the metal plate is provided with a plating layer that has lower solder wettability than a surface of the metal plate facing the base plate, and
• wherein a shortest distance between the semiconductor device and a bottom surface of the deeper area in a plan view as viewed in the thickness direction of the base plate is configured to be greater than a distance between an upper surface of the circuit member and the bottom surface of the deeper area in the thickness direction of the base plate.