Stackable fully molded semiconductor structure with vertical interconnects

A method of making a semiconductor device, comprising:

• providing a carrier;
• forming a first photoresist over the carrier with first openings through the first photoresist;
• forming a non-planar conductive seed layer over the first photoresist that conformally extends into the first openings through the first photoresist;
• forming a second photoresist over the first photoresist and over the non-planar conductive seed layer;
• patterning the second photoresist layer to form second openings through the second photoresist and extend to the non-planar conductive seed layer;
• plating conductive posts over the non-planar conductive seed layer and within the second openings;
• removing the second photoresist while leaving in place the first photoresist;
• coupling a semiconductor die to the carrier;
• and
• encapsulating the semiconductor die, the conductive posts, and the first photoresist with a mold compound.

A method of making a semiconductor device, comprising:

• providing a carrier comprising a semiconductor die mounting site;
• forming a first photoresist layer over the carrier;
• forming a seed layer over the first photoresist;
• forming a second photoresist over the first photoresist and with second openings in the second photoresist over the seed layer;
• forming conductive posts within the second openings and in a periphery of the semiconductor die mounting site;
• stripping the second photoresist while leaving in place the first photoresist before encapsulating a semiconductor die;
• disposing the semiconductor die at the semiconductor die mounting site;
• encapsulating the semiconductor die and the conductive posts with an encapsulant;
• and
• removing the first photoresist layer such that at least one end of the conductive posts are made to be offset with respect to the encapsulant.