Guard ring structures and their methods of fabrication
AssigneeIntel Corporation
InventorsHan Wui Then, Marko Radosavljevic, Sansaptak Dasgupta, Paul B. Fischer
Life of this patent
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Abstract
A guard ring structure includes a ring of semiconductor material disposed on a substrate. A conductive ring is disposed on the ring of semiconductor material. The conductive ring is interconnected by intervening vias. The guard ring structure may include a plurality of individual rings of the semiconductor material formed concentrically and in close proximity to one another on the substrate. A Guard ring structure is generally disposed around a periphery of a die containing integrated circuits that include transistors RF amplifiers and memory devices to reduce the impact of stresses arising from die sawing to separate individual die in a wafer.
Claims25
A guard ring comprising:
- a semiconductor substrate;
- a ring of a semiconductor material disposed directly on the substrate, the semiconductor material comprising a material different from the semiconductor substrate;
- and
- a conductive ring disposed on the semiconductor material.
A guard ring structure comprising:
- a substrate;
- a patterned insulator layer disposed on the substrate, the patterned insulator layer having a first ring opening and a second ring opening, the second ring opening separate from and surrounding the first ring opening;
- a group III-N semiconductor material disposed on the substrate in each of the first and the second ring openings, the group III-N semiconductor material in each of the first and in the second ring openings having a pair of sloped sidewalls and an uppermost surface;
- a contact group III-N semiconductor material disposed on the uppermost surfaces of the group III-N semiconductor material in each of the first ring opening and in the second ring opening;
- an interlayer dielectric film disposed above the patterned insulator layer, the interlayer dielectric film having a portion above the patterned insulator layer, portions adjacent to the sloped sidewalls of the group III-N semiconductor material and portions adjacent to sidewalls of the contact group III-N semiconductor material;
- and
- a plurality of conductive interconnects disposed on and coupled to the contact group III-N semiconductor material disposed above the first ring opening and above the second ring opening.
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including a guard ring, comprising:
- a semiconductor substrate;
- a ring of a semiconductor material disposed directly on the substrate, the semiconductor material comprising a material different from the semiconductor substrate;
- and
- a conductive ring disposed on the semiconductor material.
Dependencies are inferred from the claim text.