Package structure with buffer layer sandwiched between encapsulation layer and semiconductor substrate

A package structure, comprising:

• a semiconductor substrate over an adhesive layer;
• a first buffer layer over the adhesive layer, wherein the first buffer layer overlies a sidewall of the semiconductor substrate;
• a second buffer layer over the adhesive layer, wherein the adhesive layer is in direct contact with the first buffer layer and the second buffer layer, and the semiconductor substrate is separated from the adhesive layer by the second buffer layer;
• a connector over the semiconductor substrate;
• an encapsulation layer surrounding the adhesive layer, the first buffer layer and the connector, wherein the encapsulation layer covers a sidewall of the first buffer layer and a sidewall of the adhesive layer;
• and
• a passivation layer over the connector and the encapsulation layer.

A package structure, comprising:

• a semiconductor substrate over an adhesive layer;
• a connector over the semiconductor substrate;
• a first buffer layer covering a top surface of the semiconductor substrate and a sidewall of the connector;
• a second buffer layer covering a sidewall of the semiconductor substrate and a sidewall of the first buffer layer, wherein an interface between the first buffer layer and the second buffer layer is overlapped with the adhesive layer;
• and
• an encapsulation layer surrounding the second buffer layer, wherein a sidewall of the encapsulation layer is in direct contact with a sidewall of the second buffer layer and a sidewall of the adhesive layer.