Chip packaging structure
AssigneeSocle Technology Corp.
InventorsChing-Yu Ni, Hsiang-Hua Lu, Young-Way Liu
Life of this patent
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Abstract
A chip packaging structure with better reliability includes a first protective layer, a redistribution layer formed on the first protective layer, at least one chip electrically connected to the redistribution layer, and an encapsulating layer covering the redistribution layer, the chip, and the side surfaces of the first protective layer. The first protective layer comprises an exposed surface and at least four side surfaces each connected to the exposed surface. A plurality of second openings is defined in the second protective layer, and a portion of the redistribution layer is exposed from the plurality of second openings.
Claims5
A chip packaging structure comprising:
- a first protective layer, wherein the first protective layer comprises an exposed surface and at least four side surfaces each connected to the exposed surface;
- a redistribution layer formed on the first protective layer;
- a second protective layer covering the redistribution layer;
- at least one chip electrically connected to the redistribution layer;
- and
- an encapsulating layer covering the second protective layer, the chip, and the at least four side surfaces of the first protective layer;
- wherein the encapsulating layer is made of epoxy resin.
Dependencies are inferred from the claim text.