Directional spacer removal for integrated circuit structures

#This application is a national stage application under 35 U.S.C. § 371 of PCT International Application Serial No. PCT/US2017/053358, filed on Sep. 26, 2017 and entitled “DIRECTIONAL SPACER REMOVAL FOR INTEGRATED CIRCUIT STRUCTURES,” which is hereby incorporated by reference herein in its entirety.

#Sidewall spacers are used in some integrated circuits (ICs) to provide a non-conductive barrier between adjacent elements. Some sidewall spacers may be formed by conformally depositing a spacer material, then etching the spacer material “downwards” to remove the spacer material on horizontal surfaces while leaving spacer material on vertical, sidewall surfaces.

#Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. To facilitate this description, like reference numerals designate like structural elements. Embodiments are illustrated by way of example, not by way of limitation, in the figures of the accompanying drawings.

#FIGS. 1A-1C are various views of an integrated circuit (IC) structure, in accordance with various embodiments.

#FIGS. 2A-2C, 3A-3C, 4A-4C, 5A-5C, 6A-6C, 7A-7C, 8A-8C, 9A-9C, 10A-10C, 11A-11C, 12A-12C, 13A-13C, 14A-14C, 15A-15C, 16A-16C, and 17A-17C illustrate stages in an example process of manufacturing the IC structure of FIG. 1, in accordance with various embodiments.

#Disclosed herein are techniques for directional spacer removal, as well as related integrated circuit (IC) structures and devices. For example, in some embodiments, an IC structure may include: a first semiconductor fin having a first fin end cap; a second semiconductor fin having a second fin end cap, wherein the second fin end cap faces the first fin end cap; a first gate over the first semiconductor fin, wherein the first gate has a first gate end cap; a second gate over the second semiconductor fin, wherein the second gate has a second gate end cap facing the first gate end cap; and a gate edge isolation material adjacent to the first fin end cap, the second fin end cap, the first gate end cap, and the second gate end cap.

#In the following detailed description, reference is made to the accompanying drawings that form a part hereof wherein like numerals designate like parts throughout, and in which is shown, by way of illustration, embodiments that may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense.

#Various operations may be described as multiple discrete actions or operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations may not be performed in the order of presentation. Operations described may be performed in a different order from the described embodiment. Various additional operations may be performed, and/or described operations may be omitted in additional embodiments.