Transistor metal gate and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Ching-Hwanq Su
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Abstract
Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the removal and placement of differing materials within each of the individual gate stacks within a replacement gate process, whereby the removal and placement helps keep the overall process window for a fill material large enough to allow for a complete fill.
Claims20
A method comprising:
- depositing a gate dielectric over a first region, a second region, and a third region;
- depositing a first metal material over the first region, the second region, and the third region;
- depositing a first work function layer over the first region, the second region, and the third region;
- forming a first capping layer over the first region, the second region, and the third region on the first work function layer, the first capping layer comprising an insulating material;
- removing the first capping layer from the second region;
- removing the first capping layer and the first work function layer from the first region;
- and
- depositing a fill material over the first region, the second region, and the third region after the removing the first work function layer from the first region.
A method comprising:
- forming first gate materials of a first gate stack in a first device region, wherein forming the first gate materials of the first gate stack comprises:
- depositing a gate dielectric over the first device region;
- depositing a barrier layer over the first device region;
- depositing a first work function layer over the first device region;
- forming a first capping layer over the first device region on the first work function layer, the first capping layer comprising a silicon-based dielectric material, wherein forming the first capping layer comprises:
- soaking the first device region in a silicon-based gas to form a silicon layer, and
- breaking vacuum in a processing chamber, thereby oxidizing the silicon layer into silicon oxide;
- forming a second work function layer over the first capping layer in the first device region;
- and
- depositing a fill material over the first device region, the first gate stack forming a first transistor having a first threshold voltage.
A semiconductor device comprising:
- a first gate stack over a first semiconductor fin, the first gate stack comprising a first metal material;
- a second gate stack over a second semiconductor fin, the second gate stack comprising the first metal material and a first p-metal material, the first p-metal material being different from the first metal material;
- and
- a third gate stack over a third semiconductor fin, the third gate stack comprising the first metal material, the first p-metal material, and a first dielectric capping layer,
- wherein each of the first gate stack, the second gate stack, and the third gate stack comprises an n-metal material, the n-metal material in the first gate stack being in physical contact with the first metal material, the n-metal material in the second gate stack being in physical contact with the first p-metal material, and the n-metal material in the third gate stack being in physical contact with the first dielectric capping layer.
Dependencies are inferred from the claim text.