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US 11,056,390 B2Granted
Structures and methods for reliable packages
AssigneeInvensas Corporation
InventorsCyprian Emeka Uzoh, Guilian Gao, Liang Wang, Hong Shen, Arkalgud R. Sitaram
Life of this patent
Estimating the term…
Abstract
A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities.
Claims22
A stacked device comprising:
- a first semiconductor element having a first upper surface, a first lower surface, and a first side surface extending between the first upper surface and the first lower surface;
- a second semiconductor element stacked on the first semiconductor element, the second semiconductor element having a second upper surface, a second lower surface, and a second side surface extending between the second upper surface and the second lower surface;
- an interconnection layer disposed between the first upper surface of the first semiconductor element and the second lower surface of the second semiconductor elements, the interconnection layer having a third upper surface, a third lower surface, and a third side surface extending between the third upper surface and the third lower surface;
- and
- an encapsulation layer extending along the first side surface of the first semiconductor element, the second side surface of the second semiconductor element, and the third side surface of the interconnection layer.
2 more elements
A stacked device comprising:
- a first semiconductor element;
- a second semiconductor element stacked on the first semiconductor element, the second semiconductor element comprising a plurality of metallic vias disposed through the second semiconductor element, the first and second semiconductor element comprising respective first and second major lateral surfaces, the respective first major lateral surfaces facing one another and the respective second major lateral surfaces facing away from one another, each of the first and second semiconductor elements comprising a respective side surface extending between the respective first and second major lateral surfaces;
- and
- an encapsulation layer extending along the respective side surfaces of the first semiconductor element and the second semiconductor element, the encapsulation layer extending from the second major lateral surface of the first semiconductor element to the second major lateral surface of the second semiconductor element.
1 more element
Dependencies are inferred from the claim text.