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US 11,056,373 B2Granted
3D fanout stacking
AssigneeApple Inc.
InventorsJun Zhai, Kwan-Yu Lai, Kunzhong Hu
Life of this patent
Estimating the term…
Abstract
Semiconductor packages and fan out die stacking processes are described. In an embodiment, a package includes a first level die and a row of conductive pillars protruding from a front side of the first level die. A second level active die is attached to the front side of the first level die, and a redistribution layer (RDL) is formed on an in electrical contact with the row of conductive pillars and a front side of the second level active die.
Claims17
A package comprising:
- a first-first level die and a second-first level die arranged side-by-side;
- a first row of conductive pillars protruding from a first plurality of landing pads in a first build-up layer in a front side of the first-first level die;
- a second row of conductive pillars protruding from a second plurality of landing pads in a second build-up layer in a front side of the second-first level die;
- a back side of a second level active die attached to the front side of the first-first level die and the front side of the second-first level die, wherein the back side of the second level active die does not include a plurality of landing pads and the first and second rows of conductive pillars are laterally adjacent to a first pair of laterally opposite sides of the second level active die;
- a second-second level die and a third-second level die laterally adjacent to a second pair of laterally opposite sides of the second level active die;
- and
- a redistribution layer (RDL) on and in electrical contact with the first and second rows of conductive pillars and front sides of the second level active die, the second-second level die and the third-second level die;
- wherein the first row of conductive pillars is located along a first edge of the first-first level die, the second row of conductive pillars is located along a second edge of the second-first level die, the second-second level die covers a third edge of the first-first level die and a third edge of the second-first level die, and the third-second level die covers a fourth edge of the first-first level die and a fourth edge of the second-first level die;
- wherein the first row of conductive pillars is located proximally closer to the first edge of the first-first level die than a first center of the first-first level die, the second row of conductive pillars is located proximally closer to the second edge of the second-first level die than a second center of the second-first level die, and lengths of the first row of conductive pillars and the second row of conductive pillars are both shorter than the first pair of laterally opposite sides of the second level active die;
- and
- wherein the third edge of the first-first level die and the fourth edge of the first-first level die are opposing edges, and the third edge of the second-first level die and the fourth edge of the second-first level die are opposing edges.
8 more elements
A method of forming a package comprising:
- attaching a back side of a first-first level die and a back side of a second-first level die on a carrier substrate;
- attaching a back side of a second level active die to a front side of the first-first level die and a front side of the second-first level die;
- wherein the second level active die includes a first pair of laterally opposite sides laterally between and laterally adjacent to a first row of conductive copper pillars protruding directly from landing pads in a first build-up layer in the first-first level die and a second row of conductive copper pillars protruding directly from landing pads in a second build-up layer in the second-first level die;
- attaching a second-second level die and a third-second level die laterally adjacent to a second pair of laterally opposite sides of the second level active die;
- wherein the first row of conductive pillars is located proximally closer to a first edge of the first-first level die than a first center of the first-first level die, the second row of conductive pillars is located proximally closer to a second edge of the second-first level die than a second center of the second-first level die, and lengths of the first row of conductive pillars and the second row of conductive pillars are both shorter than the first pair of laterally opposite sides of the second level active die;
- encapsulating the second level active die, the second-second level die, the third-second level die, the first row of conductive copper pillars, and the second row of conductive copper pillars in a molding compound layer, such that the first build-up layer of the first-first level die and the second build-up layer of the second-first level die are separated by the molding compound layer;
- removing a thickness of the molding compound layer to expose the first row of conductive copper pillars, the second row of conductive copper pillars, and a front side of the second level active die;
- and
- forming a redistribution layer on and in electrical connection with the front side of the second level active die, a front side of the second-second level die, a front side of the third-second level die, the first row of conductive copper pillars, and the second row of conductive copper pillars.
6 more elements
Dependencies are inferred from the claim text.