Bonding surfaces for microelectronics

A method, comprising:

• preparing a dielectric surface of a wafer or die for direct-bonding during a microelectronics fabrication process, wherein the dielectric surface comprises an oxide layer;
• masking the dielectric surface with a resist material for etching a cavity in the dielectric surface;
• etching the cavity in the dielectric surface with a first etchant;
• stripping the resist material from the dielectric surface;
• overflowing the cavity with a temporary filler to preserve edges of the cavity during a chemical-mechanical planarization (CMP) process, wherein the oxide layer comprises a layer of silicon oxide and the temporary filler comprises silicon nitride, and wherein the oxide layer and the temporary filler are indistinguishable to the CMP process such that the CMP process has a 1:1 selectivity to the temporary filler as to the oxide layer with respect to both a chemical component of the CMP process and a mechanical component of the CMP process;
• applying the CMP process to planarize the temporary filler down to an interface between the temporary filler and the dielectric surface;
• and
• removing the temporary filler from the cavity with a second etchant selective to the temporary filler and nonreactive to the dielectric surface and nonreactive to inner surfaces of the cavity.