Memory device and method of operating the same

A memory device comprising:

• a memory cell array including a plurality of memory cells each having a target programmed state among a plurality of programmed states;
• a peripheral circuit configured to perform at least one program loop including applying a program voltage to a word line coupled in common to the plurality of memory cells, and selectively performing a verify operation of determining whether a threshold voltage of each of the plurality of memory cells exceeds a verify voltage;
• and
• a program operation controller configured to control the peripheral circuit to perform the at least one program loop corresponding to at least one of remaining programmed states other than a most significant programmed state among the plurality of programmed states, and apply a program pulse corresponding to the most significant programmed state to the word line.

A method of operating a memory device including a plurality of memory cells each having a target programmed state among a plurality of programmed states, the method comprising:

• performing at least one program loop corresponding to at least one of the programmed states other than a most significant programmed state among the plurality of programmed states;
• verifying a threshold voltage of each of the plurality of memory cells having the most significant programmed state as the target programmed state;
• controlling a voltage to be applied to a bit line coupled to each of memory cells having the most significant programmed state as the target programmed state based on a result of the verifying;
• and
• applying a program pulse corresponding to the most significant programmed state to a word line,
• wherein the at least one program loop includes applying a program voltage to a word line coupled in common to the plurality of memory cells, and selectively performing a verify operation of determining whether a threshold voltage of each of the plurality of memory cells exceeds a verify voltage.