Strap cell design for static random access memory (SRAM) array

A static random access memory (SRAM) array, comprising:

• a first bit cell array and a second bit cell array arranged along a first direction;
• a strap cell arranged along a second direction and positioned between the first bit cell array and the second bit cell array along the first direction,
• wherein the strap cell comprises:
• a first P-type well region;
• two first N-type well regions;
• a second N-type well region, wherein a first portion of the first P-type well region is between the two first N-type well regions in the first direction, and a second portion of the first P-type well region is between one of the two first N-type well regions and the second N-type well region in the second direction;
• and
• a deep N-type well region underlying the two first N-type well regions and the second N-type well region.

A static random access memory (SRAM) array, comprising:

• a first bit cell array and a second bit cell array arranged along a first direction;
• a strap cell arranged along a second direction and positioned between the first bit cell array and the second bit cell array along the first direction,
• wherein the strap cell comprises:
• a first P-type well region;
• two first N-type well regions arranged in the first direction;
• a second N-type well region, wherein the two first N-type well regions, the first P-type well region, and the second N-type well region are sequentially arranged in the second direction;
• and
• a deep N-type well region underlying the two first N-type well regions and the second N-type well region.