US 11,056,174 B2 · Dynamic random access memory with shaped word-line waveform

Abstract

A DRAM chip includes a DRAM cell and a first voltage source. The DRAM cell includes an access transistor, and one terminal of the access transistor is coupled to a word line. The first voltage source is selectively coupled to the access transistor via the word line, and generates a first voltage level higher than a sum of a threshold voltage of the access transistor and a voltage level of a signal ONE utilized in the DRAM chip. A whole access cycle includes an access operation period and a restore phase period. When the whole access cycle begins, the one terminal of the access transistor is initially applied by the first voltage level for a first portion of the access operation period and then applied by a second voltage level for a second portion of the access operation period. The second voltage level is lower than the first voltage level.

Claims15

Dependent claims

A DRAM chip comprising:

a DRAM cell;
and
an access transistor coupled to the DRAM cell, the access transistor comprising a gate terminal;
wherein a whole access cycle comprises an access operation period and a restore phase period after the access operation period, when the whole access cycle begins, the gate terminal of the access transistor is initially applied by a first voltage level for a first portion of the access operation period and then applied by a second voltage level for a second portion of the access operation period before the restore phase period;
wherein the first voltage level is higher than a sum of a threshold voltage of the access transistor and a voltage level of a signal ONE utilized in the DRAM chip, and the second voltage level is lower than the first voltage level.

2 more elements

Dependencies are inferred from the claim text.

Dynamic random access memory with shaped word-line waveform

Life of this patent

Dynamic random access memory with shaped word-line waveform

Life of this patent

Abstract

Claims15