Apparatuses and methods for wide clock frequency range command paths

An apparatus, comprising:

• a command decoder configured to receive a command and further configured to decode the command to provide a decoded command;
• and
• a command timing circuit configured to receive the decoded command responsive to a clock and further configured to provide a delayed internal command having a delay relative to receiving the decoded command based on clock frequency information indicative of a clock frequency of the clock, the command timing circuit including:
• a plurality of command timing paths, each configured to provide a respective delay to the decoded command for a respective range of clock frequencies, wherein a first of the plurality of command timing paths includes a first number of clocked flip-flop circuits and wherein a second of the plurality of command timing paths includes a second number of clocked flip-flop circuits, the second number different than the first number.

An apparatus, comprising:

• a data input/output circuit configured to provide output data or receive input data responsive to being enabled by the output command from the command path;
• and
• a command path configured to receive a command, and responsive to a clock provide an output command to the data input/output circuit having a delay relative to receiving the command to meet a latency setting,
• wherein the command path includes a command timing circuit configured to receive the clock and to provide a first delay to the command using a first number of clock cycles of the clock having a clock frequency within a first range of clock frequencies and provide a second delay to the command using a second number of clock cycles of the clock having clock frequency within a second range clock frequencies, the second number of clock cycles different from the first number of clock cycles, wherein the command timing circuit comprises:
• a plurality of command timing paths, each configured to receive the command and provide a respective delay to the command for a respective range of clock frequencies;
• and
• a clock circuit configured to receive the clock and provide one of the plurality of command timing paths the clock based on a clock frequency of the clock.

A method, comprising:

• decoding a command to provide a decoded command;
• responsive to a clock, delaying the decoded command through a first command timing path for a first range of clock frequencies of the clock, the first command timing path providing a first delay using a first number of clock cycles of the clock, and the first delay less than a time for the first number of clock cycles;
• and
• delaying the decoded command through a second command timing path for a second range of clock frequencies of the clock, the second command timing path providing a second delay including a second number of clock cycles of the clock that is different than the first number of clock cycles.